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Valeriy Sukharev
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2020 – today
- 2024
- [c27]Valeriy Sukharev, Jun-Ho Choy, Armen Kteyan, J. Shuster-Passage, Seungman Choi, Martin Gall:
A Unified Physics-Based Stochastic Model for EM-Induced Resistance Degradation in BEoL Interconnect Segments. IRPS 2024: 1-10 - [c26]Yong Hyeon Yi, Chris H. Kim, Armen Kteyan, Alexander Volkov, Stéphane Moreau, Valeriy Sukharev:
Electromigration Test Chip Experiments from Realistic Power Grid Structures: Failure Trend Comparison and Statistical Analysis. IRPS 2024: 1-6 - [c25]J. Shuster-Passage, S. Abdel Razek, M. Mattoo, Meike Hauschildt, Seungman Choi, Martin Gall, Armen Kteyan, Jun-Ho Choy, Valeriy Sukharev, Matthias Kraatz, J. R. Lloyd:
A Novel Method for the Determination of Electromigration-Induced Void Nucleation Stresses. IRPS 2024: 10 - [c24]Jun-Ho Choy
, Stéphane Moreau
Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects. ISPD 2024: 85-90 - 2023
- [c23]Yong Hyeon Yi, Chris H. Kim, Chen Zhou, Armen Kteyan, Valeriy Sukharev:
Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters. IRPS 2023: 1-5 - [c22]Armen Kteyan
Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution. ISPD 2023: 124-132 - 2022
- [j9]Valeriy Sukharev
Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4837-4850 (2022) - [c21]Armen Kteyan, Valeriy Sukharev, Y. Yi, Chris H. Kim:
Novel methodology for temperature-aware electromigration assessment in on-chip power grid: simulations and experimental validation (Invited). IRPS 2022: 8 - [c20]Armen Kteyan, Jun-Ho Choy, Valeriy Sukharev, Massimo Bertoletti, Carmelo Maiorca, Rossana Zadra, Massimo Inzaghi, Gabriele Gattere, Giancarlo Zinco, Paolo Valente, Roberto Bardelli, Alessandro Valerio, Pierluigi Rolandi, Mattia Monetti, Valentina Cuomo, Salvatore Santapa:
Novel Methodology for Assessing Chip-Package Interaction Effects onChip Performance. ISPD 2022: 83-89 - 2020
- [c19]Adam Issa, Valeriy Sukharev, Farid N. Najm
Electromigration Checking Using a Stochastic Effective Current Model. ICCAD 2020: 5:1-5:8
2010 – 2019
- 2019
- [c18]Valeriy Sukharev, Armen Kteyan, Jun-Ho Choy:
An Accurate Assessment of Chip-Package Interaction is a Key Factor for Designing Resilient 3D IC Systems. 3DIC 2019: 1-6 - [c17]Zahi Moudallal, Valeriy Sukharev, Farid N. Najm:
Power Grid Fixing for Electromigration-induced Voltage Failures. ICCAD 2019: 1-8 - [c16]Armen Kteyan, Henrik Hovsepyan, Jun-Ho Choy, Valeriy Sukharev:
Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages. IRPS 2019: 1-7 - [c15]Farid N. Najm, Valeriy Sukharev:
Efficient Simulation of Electromigration Damage in Large Chip Power Grids Using Accurate Physical Models (Invited Paper). IRPS 2019: 1-10 - 2018
- [j8]Sandeep Chatterjee
Power Grid Electromigration Checking Using Physics-Based Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1317-1330 (2018) - 2017
- [j7]Xin Huang, Valeriy Sukharev
Dynamic electromigration modeling for transient stress evolution and recovery under time-dependent current and temperature stressing. Integr. 58: 518-527 (2017) - [c14]Sandeep Chatterjee, Valeriy Sukharev, Farid N. Najm:
Fast physics-based electromigration assessment by efficient solution of linear time-invariant (LTI) systems. ICCAD 2017: 659-666 - 2016
- [j6]Xin Huang, Valeriy Sukharev
Electromigration assessment for power grid networks considering temperature and thermal stress effects. Integr. 55: 307-315 (2016) - [j5]Hai-Bao Chen, Sheldon X.-D. Tan, Xin Huang, Taeyoung Kim
Analytical Modeling and Characterization of Electromigration Effects for Multibranch Interconnect Trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11): 1811-1824 (2016) - [j4]Xin Huang, Armen Kteyan, Sheldon X.-D. Tan, Valeriy Sukharev
Physics-Based Electromigration Models and Full-Chip Assessment for Power Grid Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11): 1848-1861 (2016) - [c13]Xin Huang, Valeriy Sukharev
Electromigration recovery modeling and analysis under time-dependent current and temperature stressing. ASP-DAC 2016: 244-249 - [c12]Xin Huang, Valeriy Sukharev
Physics-based full-chip TDDB assessment for BEOL interconnects. DAC 2016: 45:1-45:6 - [c11]Taeyoung Kim, Xin Huang, Hai-Bao Chen, Valeriy Sukharev, Sheldon X.-D. Tan:
Learning-based dynamic reliability management for dark silicon processor considering EM effects. DATE 2016: 463-468 - [c10]Sandeep Chatterjee, Valeriy Sukharev
Fast physics-based electromigration checking for on-die power grids. ICCAD 2016: 110 - 2015
- [c9]Hai-Bao Chen, Sheldon X.-D. Tan, Xin Huang, Valeriy Sukharev
New electromigration modeling and analysis considering time-varying temperature and current densities. ASP-DAC 2015: 352-357 - [c8]Hai-Bao Chen, Sheldon X.-D. Tan, Valeriy Sukharev
Interconnect reliability modeling and analysis for multi-branch interconnect trees. DAC 2015: 90:1-90:6 - [c7]Jun-Ho Choy, Valeriy Sukharev
Post placement leakage reduction with stress-enhanced filler cells. ISLPED 2015: 303-308 - 2014
- [c6]Xin Huang, Tan Yu, Valeriy Sukharev
Physics-based Electromigration Assessment for Power Grid Networks. DAC 2014: 80:1-80:6 - [c5]Valeriy Sukharev
IR-drop based electromigration assessment: parametric failure chip-scale analysis. ICCAD 2014: 428-433 - [c4]Taeyoung Kim
Lifetime optimization for real-time embedded systems considering electromigration effects. ICCAD 2014: 434-439 - 2012
- [j3]Valeriy Sukharev
Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance. J. Electron. Test. 28(1): 63-72 (2012) - 2010
- [c3]Vivek Joshi, Valeriy Sukharev
Closed-form modeling of layout-dependent mechanical stress. DAC 2010: 673-678
2000 – 2009
- 2009
- [c2]Valeriy Sukharev
Control of design specific variation in etch-assisted via pattern transfer by means of full-chip simulation. ISQED 2009: 156-161 - 2005
- [j2]Valeriy Sukharev
Physically based simulation of electromigration-induced degradation mechanisms in dual-inlaid copper interconnects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(9): 1326-1335 (2005) - 2004
- [c1]Valeriy Sukharev
Physically-Based Simulation of Electromigration Induced Failures in Copper Dual-Damascene Interconnect. ISQED 2004: 225-231 - 2001
- [j1]Valeriy Sukharev
Reliability Studies on Multilevel Interconnection with Intermetal Dielectric Air Gaps. Microelectron. Reliab. 41(9-10): 1631-1635 (2001)
Coauthor Index
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