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Xiaolang Yan
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2020 – today
- 2024
- [j49]Chunqiang Li
, Zhiwei Liu
SPC-Indexed Indirect Branch Hardware Cache Redirecting Technique in Binary Translation. J. Circuits Syst. Comput. 33(13): 2450242:1-2450242:24 (2024) - 2023
- [j48]Kai Huang, Bowen Li
Structured Term Pruning for Computational Efficient Neural Networks Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 190-203 (2023) - [j47]Kai Huang
Structured Dynamic Precision for Deep Neural Networks Quantization. ACM Trans. Design Autom. Electr. Syst. 28(1): 12:1-12:24 (2023) - 2022
- [c42]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie:
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. ICPADS 2022: 483-490 - [i2]Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie:
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. CoRR abs/2207.13848 (2022) - 2021
- [j46]Kai Huang, Ke Wang
Expected Energy Optimization for Real-Time Multiprocessor SoCs Running Periodic Tasks with Uncertain Execution Time. IEEE Trans. Sustain. Comput. 6(3): 398-411 (2021) - 2020
- [c41]Chen Chen, Xiaoyan Xiang, Chang Liu, Yunhai Shang
Xuantie-910: Innovating Cloud and Edge Computing by RISC-V. Hot Chips Symposium 2020: 1-19 - [c40]Chen Chen, Xiaoyan Xiang, Chang Liu, Yunhai Shang
Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension : Industrial Product. ISCA 2020: 52-64
2010 – 2019
- 2019
- [j45]Kai Huang, Xiaowen Jiang
Fine-Grained Communication-Aware Task Scheduling Approach for Acyclic and Cyclic Applications on MPSoCs. IEEE Access 7: 54372-54389 (2019) - [j44]Menghan Jia, Feiteng Li, Zhijian Chen, Xiaoyan Xiang, Xiaolang Yan:
High Noise Tolerant R-Peak Detection Method Based on Deep Convolution Neural Network. IEICE Trans. Inf. Syst. 102-D(11): 2272-2275 (2019) - [j43]Kai Huang, Xiaomeng Zhang
A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1744-1757 (2019) - 2018
- [j42]Xiaomeng Zhang
BFCO: A BPSO-Based Fine-Grained Communication Optimization Method for MPSoC. IEEE Access 6: 18771-18785 (2018) - [j41]Kai Huang, Xiaowen Jiang
Energy-Efficient Fault-Tolerant Mapping and Scheduling on Heterogeneous Multiprocessor Real-Time Systems. IEEE Access 6: 57614-57630 (2018) - [j40]Kai Huang, Ke Wang
Curve fitting based shared cache partitioning scheme for energy saving. IEICE Electron. Express 15(22): 20180886 (2018) - 2017
- [j39]Dongliang Xiong
Providing Predictable Performance via a Slowdown Estimation Model. ACM Trans. Archit. Code Optim. 14(3): 25:1-25:26 (2017) - [j38]Zhan-Hui Li
Eliminating Timing Errors Through Collaborative Design to Maximize the Throughput. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 670-682 (2017) - [j37]Tao-Tao Zhu
Error-Resilient Integrated Clock Gate for Clock-Tree Power Optimization on a Wide Voltage IOT Processor. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1681-1693 (2017) - [c39]Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu
OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators. ESSCIRC 2017: 259-262 - 2016
- [j36]Li Zhanhui, Yong Ding, Xiaolang Yan, Jianyi Meng, Xiaoyan Xiang:
Light-weight one-cycle timing error correction based on hardware software co-design. IEICE Electron. Express 13(11): 20160411 (2016) - [j35]Ziyi Hao, Xiaoyan Xiang, Chen Chen, Jianyi Meng, Yong Ding, Xiaolang Yan:
EDSU: Error detection and sampling unified flip-flop with ultra-low overhead. IEICE Electron. Express 13(16): 20160682 (2016) - [j34]Dongliang Xiong
Memory Access Scheduling Based on Dynamic Multilevel Priority in Shared DRAM Systems. ACM Trans. Archit. Code Optim. 13(4): 42:1-42:26 (2016) - 2015
- [j33]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo, Weiwei Pan:
Fast Level-Set-Based Inverse Lithography Algorithm for Process Robustness Improvement and Its Application. J. Comput. Sci. Technol. 30(3): 629-638 (2015) - [j32]Shupeng Wang
Hybrid Model: An Efficient Symmetric Multiprocessor Reference Model. J. Electr. Comput. Eng. 2015: 915409:1-915409:10 (2015) - [j31]Kai Huang, Xiaoxu Zhang
Profiling and annotation combined method for multimedia application specific MPSoC performance estimation. Frontiers Inf. Technol. Electron. Eng. 16(2): 135-151 (2015) - [j30]Kai Huang, Min Yu, Rongjie Yan, Xiaomeng Zhang, Xiaolang Yan, Lisane B. de Brisolara
Communication Optimizations for Multithreaded Code Generation from Simulink Models. ACM Trans. Embed. Comput. Syst. 14(3): 59:1-59:26 (2015) - [j29]Kai Huang, Peng Zhu
Functional Testbench Qualification by Mutation Analysis. VLSI Design 2015: 256474:1-256474:9 (2015) - 2014
- [j28]Yong Ding, Yuan Zhang, Xiang Wang, Xiaolang Yan, Andrey S. Krylov
Perceptual image quality assessment metric using mutual information of Gabor features. Sci. China Inf. Sci. 57(3): 1-9 (2014) - [j27]Kai Huang, Min Yu, Xiaomeng Zhang, Dan-dan Zheng, Siwen Xiu, Rongjie Yan, Kai Huang, Zhili Liu, Xiaolang Yan:
ILP Based Multithreaded Code Generation for Simulink Model. IEICE Trans. Inf. Syst. 97-D(12): 3072-3082 (2014) - [j26]Kai-sheng Luo, Zheng Shi, Xiaolang Yan, Zhen Geng:
SVM based layout retargeting for fast and regularized inverse lithography. J. Zhejiang Univ. Sci. C 15(5): 390-400 (2014) - [c38]Yanchen Long, Zhonghai Lu, Xiaolang Yan:
Analysis and evaluation of per-flow delay bound for multiplexing models. DATE 2014: 1-4 - [c37]Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan:
SoC processor for real-time object labeling in life camera streams with low line level latency. ISCAS 2014: 345-348 - 2013
- [j25]Zhi Zhang, Zhonghai Lu, Qiang Chen, Xiaolang Yan, Li-Rong Zheng:
Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis. Int. J. Commun. Syst. 26(11): 1502 (2013) - [j24]Li-sheng Chen, Xiao-hua Luo, Jiao-jiao Zhu, Fan-chao Jie, Xiaolang Yan:
Novel serpentine structure design method considering confidence level and estimation precision. J. Zhejiang Univ. Sci. C 14(3): 222-234 (2013) - [j23]Kai Huang, De Ma, Rongjie Yan, Haitong Ge, Xiaolang Yan:
High throughput VLSI architecture for H.264/AVC context-based adaptive binary arithmetic coding (CABAC) decoding. J. Zhejiang Univ. Sci. C 14(6): 449-463 (2013) - [j22]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo:
Regularized level-set-based inverse lithography algorithm for IC mask synthesis. J. Zhejiang Univ. Sci. C 14(10): 799-807 (2013) - [j21]De Ma, Rongjie Yan, Kai Huang, Min Yu, Siwen Xiu, Haitong Ge, Xiaolang Yan, Ahmed Amine Jerraya:
Performance Estimation Techniques With MPSoC Transaction-Accurate Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1920-1933 (2013) - [j20]Yun Pan, Ning Zheng, Qinglin Tian
Hierarchical Resampling Algorithm and Architecture for Distributed Particle Filters. J. Signal Process. Syst. 71(3): 237-246 (2013) - [c36]Zhen Geng, Zheng Shi, Xiaolang Yan, Kai-sheng Luo:
A New Level-Set-Based Inverse Lithography Algorithm for Process Robustness Improvement with Attenuated Phase Shift Mask. CAD/Graphics 2013: 68-73 - [c35]Qinglin Tian
Particle state compression scheme for centralized memory-efficient particle filters. ICASSP 2013: 2577-2581 - [c34]Yimu Wang, Alexander Peyls, Yun Pan, Luc Claesen, Xiaolang Yan:
A Fast Self-Organizing Map Algorithm for Handwritten Digit Recognition. MUE 2013: 177-183 - 2012
- [j19]Zhi Zhang, Zhonghai Lu, Qiang Chen, Xiaolang Yan:
Design and Optimization of a CDMA-Based Multi-Reader Passive UHF RFID System for Dense Scenarios. IEICE Trans. Commun. 95-B(1): 206-216 (2012) - [j18]Zhi Zhang, Zhonghai Lu, Qiang Chen, Xiaolang Yan, Li-Rong Zheng:
Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis. Int. J. Commun. Syst. 25(9): 1103-1121 (2012) - [j17]Jie Ren, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
Array based HV/VH tree: an effective data structure for layout representation. J. Zhejiang Univ. Sci. C 13(3): 232-237 (2012) - [j16]Jiao-jiao Zhu, Xiao-hua Luo, Li-sheng Chen, Yi Ye, Xiaolang Yan:
Scratch-concerned yield modeling for IC manufacturing involved with a chemical mechanical polishing process. J. Zhejiang Univ. Sci. C 13(5): 376-384 (2012) - [j15]Xiao-hua Luo, Li-sheng Chen, Jiao-jiao Zhu, Xiaolang Yan:
A new via chain design method considering confidence level and estimation precision. J. Zhejiang Univ. Sci. C 13(9): 702-710 (2012) - [c33]Ning Zheng, Yun Pan, Xiaolang Yan, Ruohong Huan:
Hierarchical resampling architecture for distributed particle filters. ICASSP 2012: 1565-1568 - [c32]Ning Zheng, Yun Pan, Xiaolang Yan, Ruohong Huan:
Weight sorting based scheme and architecture for distributed particle filters. ISCAS 2012: 1472-1475 - 2011
- [j14]Min-yong Wan, Yong Ding, Yun Pan, Xiaolang Yan:
An Efficient Compatibility-Based Test Data Compression and Its Decoder Architecture. J. Electron. Test. 27(6): 787-796 (2011) - [j13]Bin Lin, Xiaolang Yan, Zheng Shi, Yiwei Yang:
A sparse matrix model-based optical proximity correction algorithm with model-based mapping between segments and control sites. J. Zhejiang Univ. Sci. C 12(5): 436-442 (2011) - [j12]Ai-lian Cheng, Yun Pan, Xiaolang Yan, Ruohong Huan:
A general communication performance evaluation model based on routing path decomposition. J. Zhejiang Univ. Sci. C 12(7): 561-573 (2011) - [j11]Yong Ding, Xiao-hua Luo, Xiaolang Yan:
Current oscillations and low-frequency noises in GaAs MESFET channels with sidegating bias. J. Zhejiang Univ. Sci. C 12(7): 597-603 (2011) - [j10]Bin Lin, Xiaolang Yan, Zheng Shi, Yiwei Yang:
Erratum to: A sparse matrix model-based optical proximity correction algorithm with model-based mapping between segments and control sites. J. Zhejiang Univ. Sci. C 12(7): 614 (2011) - [j9]Xiang Wang, Yong Ding, Ming-Yu Liu, Xiaolang Yan:
Efficient implementation of a cubic-convolution based image scaling engine. J. Zhejiang Univ. Sci. C 12(9): 743-753 (2011) - [j8]Jiana Lou, Xiaobo Wu, Menglian Zhao, Xiaolang Yan:
A green-switch controller IC for cascade buck-boost converter with seamless transition over entire input and load range. Microelectron. J. 42(10): 1151-1163 (2011) - [j7]Yong Ding, Xiaolang Yan:
A robust motion estimation with center-biased diamond search and its parallel architecture for motion-compensated de-interlace. J. Supercomput. 58(1): 68-83 (2011) - [c31]Bo Zhang, Weiwei Pan, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
A fully automated large-scale addressable test chip design with high reliability. ECCTD 2011: 61-64 - [c30]Huan Wang, Yun Pan, Xiaolang Yan, Ruohong Huan:
Behavioral modeling of direct sampling mixer. ISCAS 2011: 1892-1895 - [c29]Weiwei Pan, Jie Ren, Yongjun Zheng, Zheng Shi, Xiaolang Yan:
Using NMOS transistors as switches for accuracy and area-efficiency in large-scale addressable test array. ISQED 2011: 533-538 - 2010
- [j6]Yun Pan, Ning Ge, Xiaolang Yan, Xiao-peng Yu:
Discrete-time charge analysis for a digital RF charge sampling mixer. J. Zhejiang Univ. Sci. C 11(4): 307-314 (2010) - [c28]Chunshu Li, Kai Huang, Xiaolang Yan, Jiong Feng, De Ma, Haitong Ge:
A high efficient memory architecture for H.264/AVC motion compensation. ASAP 2010: 239-245 - [c27]Zhi Zhang, Zhonghai Lu, Qiang Chen, Xiaolang Yan, Li-Rong Zheng:
COSMO: CO-Simulation with MATLAB and OMNeT++ for Indoor Wireless Networks. GLOBECOM 2010: 1-6 - [c26]Zhi Zhang, Zhonghai Lu, Zhibo Pang, Xiaolang Yan, Qiang Chen, Li-Rong Zheng:
A Low Delay Multiple Reader Passive RFID System Using Orthogonal TH-PPM IR-UWB. ICCCN 2010: 1-6
2000 – 2009
- 2009
- [j5]Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara
Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. Integr. 42(2): 227-245 (2009) - 2008
- [c25]Xiaoru Xu, Xiaobo Wu, Xiaolang Yan:
A quasi fixed frequency constant on time controlled boost converter. ISCAS 2008: 2206-2209 - 2007
- [j4]JianXing Fan, Huazhong Yang, Hui Wang, Xiaolang Yan, Chaohuan Hou:
Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations. Sci. China Ser. F Inf. Sci. 50(4): 587-599 (2007) - [j3]Yuhua Cheng, Xiaobo Wu, Xiaolang Yan:
Analysis of Hybrid Translinear Circuit and Its Application. Eng. Lett. 14(1): 35-39 (2007) - [j2]Shurong Gu, Xiaobo Wu, Xiaolang Yan:
A High Precision Bandgap Reference Used in Power Management ICs. Eng. Lett. 14(1): 45-48 (2007) - [c24]Jianying Peng, Xing Qin, Dexian Li, Xiaolang Yan, Xiexiong Chen:
An Efficient SIMD Architecture with Parallel Memory for 2D Cosine Transforms of Video Coding. ASAP 2007: 260-265 - [c23]Feijun Zheng, Kwang-Ting Cheng, Xiaolang Yan, John Moondanos, Ziyad Hanna:
An Efficient Diagnostic Test Pattern Generation Framework Using Boolean Satisfiability. ATS 2007: 288-294 - [c22]Kai Huang, Sang-Il Han, Katalin Popovici, Lisane B. de Brisolara, Xavier Guerin, Lei Li, Xiaolang Yan, Soo-Ik Chae, Luigi Carro, Ahmed Amine Jerraya:
Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. DAC 2007: 39-42 - [c21]Chunyue Liu, Xiaolang Yan, Xing Qin:
An optimized linear skewing interleave scheme for on-chip multi-access memory systems. ACM Great Lakes Symposium on VLSI 2007: 8-13 - [c20]Ye Chen, Zheng Shi, Xiaolang Yan:
An Automated and Fast OPC Algorithm for OPC-Aware Layout Design. ISQED 2007: 782-787 - [c19]Chunyue Liu, Xing Qin, Xiaolang Yan:
Explicit data organization SIMD instruction set architecture for media processors. Parallel and Distributed Computing and Networks 2007: 212-217 - [i1]Min Li, Xiaobo Wu, Richard Yao, Xiaolang Yan:
Q-DPM: An Efficient Model-Free Dynamic Power Management Technique. CoRR abs/0710.4739 (2007) - 2006
- [c18]Hai Chen, Xiaobo Wu, Xiaolang Yan:
A BiCMOS Low Voltage Low Distortion Class AB Amplifier. APCCAS 2006: 728-731 - [c17]Danyan Zhang, Xiaobo Wu, Menglian Zhao, Hai Chen, Xiaolang Yan:
Load Share Controller IC and Its Control Strategy Design. APCCAS 2006: 1379-1382 - [c16]Yuhua Cheng, Xiaobo Wu, Xiaolang Yan:
Translinear Loop Principle and Identification of the Translinear Loops. APCCAS 2006: 1667-1670 - [c15]Jianying Peng, Xing Qin, Jian Yang, Xiaolang Yan, Xiexiong Chen:
A Programmable Bitstream Parser for Multiple Video Coding Standards. ICICIC (3) 2006: 609-612 - [c14]Yuhua Cheng, Xiaobo Wu, Xiaolang Yan:
Analysis of Hybrid Translinear Circuit and Its Application. IMECS 2006: 375-380 - [c13]Shurong Gu, Xiaobo Wu, Xiaolang Yan:
A High Precision Bandgap Reference Used in Power Management Ics. IMECS 2006: 386-389 - 2005
- [j1]Xiaolang Yan, Zheng Shi, Ye Chen, Yue Ma, Gensheng Gao:
Full-IC manufacturability check based on dense silicon imaging. Sci. China Ser. F Inf. Sci. 48(4): 533-544 (2005) - [c12]Xiaolang Yan, Ye Chen, Zheng Shi, Yue Ma:
A new method for model based frugal OPC. ASP-DAC 2005: 83-86 - [c11]Yongjian Tang, Lenian He, Xiaolang Yan:
A novel data processing circuit in high-speed serial communication. ASP-DAC 2005: 1228-1231 - [c10]Min Li, Xiaobo Wu, Richard Yao, Xiaolang Yan:
Q-DPM: An Efficient Model-Free Dynamic Power Management Technique. DATE 2005: 526-527 - [c9]Min Li, Xiaobo Wu, Zihua Guo, Richard Yao, Xiaolang Yan:
Processor Load Analysis for Mobile Multimedia Streaming: The Implication of Power Reduction. ICME 2005: 1480-1483 - [c8]Xiaolang Yan, Ying Qin, Ye Yang, Haitong Ge:
A high performance architecture of EBCOT encoder in JPEG 2000. ISCAS (1) 2005: 492-495 - [c7]Xing Qin, Xiaolang Yan, Haitong Ge, Ye Yang:
A simplified algorithm of JPEG2000 rate control for VLSI implementation. ISCAS (6) 2005: 6316-6319 - 2004
- [c6]Min Li, Xiaobo Wu, Menglian Zhao, Hui Wang, Xiaolang Yan:
Power Consumption of Wireless NIC and Its Impact on Joint Routing and Power Control in Ad Hoc Network. EUC 2004: 238-248 - [c5]Min Li, Xiaobo Wu, Menglian Zhao, Hui Wang, Xiaolang Yan:
Heterogeneous Grid Computing for Energy Constrained Mobile Device. EUC 2004: 356-365 - [c4]Min Li, Xiaobo Wu, Menglian Zhao, Hui Wang, Ping Li, Xiaolang Yan:
Joint Task Placement, Routing and Power Control for Low Power Mobile Grid Computing in Ad Hoc Network. GCC 2004: 591-600 - [c3]Min Li, Xiaobo Wu, Menglian Zhao, Ping Li, Xiaolang Yan:
Robust and Adaptive Dynamic Power Management for Time Varying System. ICESS 2004: 449-455 - [c2]Xing Qin, Xiaolang Yan, Chong-Peng Yang, Yang Ye:
Tiling artifact reduction for JPEG2000 image at low bit-rate. ICME 2004: 1419-1422 - 2003
- [c1]Zhan Xu, Xiaolang Yan, Yongjiang Lu, Haitong Ge:
Equivalence Checking Using Independent Cuts. Asian Test Symposium 2003: 482-487
Coauthor Index
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last updated on 2024-10-07 22:06 CEST by the dblp team
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