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Zhibo Wang 0004
Person information
- affiliation: Tsinghua University, Department of Electronic Engineering, Beijing, China
Other persons with the same name
- Zhibo Wang — disambiguation page
- Zhibo Wang 0001
— Zhejiang University, Hangzhou, China
- Zhibo Wang 0002
- Zhibo Wang 0003
- Zhibo Wang 0005 — University of Toronto, Toronto, ON, Canada
- Zhibo Wang 0006 — Binghamton University, State University of New York, Binghamton, NY, USA
- Zhibo Wang 0007
- Zhibo Wang 0008 — Georgia State University, Atlanta, GA, USA
- Zhibo Wang 0009 — Beijing University of Posts and Telecommunications, Beijing, China
- Zhibo Wang 0010
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2010 – 2019
- 2019
- [j6]Yongpan Liu
A 130-nm Ferroelectric Nonvolatile System-on-Chip With Direct Peripheral Restore Architecture for Transient Computing System. IEEE J. Solid State Circuits 54(3): 885-895 (2019) - [j5]Jinshan Yue
A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 277-281 (2019) - [j4]Yixiong Yang
A 2.2-GHz Configurable Direct Digital Frequency Synthesizer Based on LUT and Rotation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1970-1980 (2019) - [c11]Jinshan Yue, Yongpan Liu, Fang Su, Shuangchen Li, Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang:
AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip. ASP-DAC 2019: 146-151 - [c10]Zhe Yuan, Jingyu Wang, Yixiong Yang, Jinshan Yue, Zhibo Wang, Xiaoyu Feng, Yanzhi Wang, Xueqing Li, Huazhong Yang, Yongpan Liu:
A Sparse-Adaptive CNN Processor with Area/Performance balanced N-Way Set-Associate PE Arrays Assisted by a Collision-Aware Scheduler. A-SSCC 2019: 61-64 - [c9]Jinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu:
A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm2and 6T HBST-TRAM-Based 2D Data-Reuse Architecture. ISSCC 2019: 138-140 - 2018
- [c8]Kaisheng Ma
NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing. ASPLOS 2018: 782-796 - [c7]Yixiong Yang, Zhibo Wang, Pei Yang, Meng-Fan Chang, Mon-Shu Ho, Huazhong Yang, Yongpan Liu:
A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation. ISCAS 2018: 1-5 - [c6]Zhe Yuan, Jinshan Yue, Huanrui Yang, Zhibo Wang, Jinyang Li, Yixiong Yang, Qingwei Guo, Xueqing Li, Meng-Fan Chang, Huazhong Yang, Yongpan Liu:
Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers. VLSI Circuits 2018: 33-34 - 2017
- [j3]Albert Lee, Chieh-Pu Lo
A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors. IEEE J. Solid State Circuits 52(8): 2194-2207 (2017) - [j2]Zhibo Wang, Yongpan Liu
A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed. IEEE J. Solid State Circuits 52(10): 2769-2785 (2017) - 2016
- [c5]Yongpan Liu, Zhibo Wang, Albert Lee, Fang Su, Chieh-Pu Lo
4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic. ISSCC 2016: 84-86 - [c4]Zhibo Wang, Rui Hua
A compare-and-select error tolerant scheme for nonvolatile processors. NANOARCH 2016: 21-22 - [c3]Fang Su, Zhibo Wang, Jinyang Li, Meng-Fan Chang, Yongpan Liu:
Design of nonvolatile processors and applications. VLSI-SoC 2016: 1-6 - 2015
- [j1]Yinan Sun, Yongpan Liu, Zhibo Wang, Huazhong Yang:
Multistage Function Speculation Adders. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(4): 954-965 (2015) - [c2]Zhibo Wang, Yongpan Liu, Yinan Sun, Yang Li, Daming Zhang, Huazhong Yang:
An energy-efficient heterogeneous dual-core processor for Internet of Things. ISCAS 2015: 2301-2304 - [c1]Yongpan Liu, Fang Su, Zhibo Wang, Huazhong Yang:
Design exploration of inrush current aware controller for nonvolatile processor. NVMSA 2015: 1-6
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