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Haolin Han
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2020 – today
- 2024
- [j5]Haolin Han
, Jinwei Zhang, Ruili Ren, Yi Shen, Shubin Liu, Ruixue Ding:
A PVT-robust Gm-R-based residue amplifier with folded positive feedback technique. Microelectron. J. 151: 106352 (2024) - [j4]Haolin Han
A 68.5 dB-SNDR, 12.4-fJ/conv.-step, 100-MS/s pipelined-SAR ADC with PVT-enhanced circuitry. Microelectron. J. 153: 106432 (2024) - [j3]Haolin Han
A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1495-1505 (2024) - 2023
- [c2]Zhicheng Dong
A 0.012mm2 36.41kHz Temperature-insensitive Current-Reuse Ring Oscillator Achieving 0.077%/V Line Sensitivity across a 1.3V-to-3.7V unregulated Supply. CICC 2023: 1-2 - [c1]Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong
A 12b 1.5GS/s Single-Channel Pipelined SAR ADC with a Pipelined Residue Amplification Stage. CICC 2023: 1-2 - 2020
- [j2]Shubin Liu, Haolin Han, Yi Shen, Zhangming Zhu
A 12-Bit 100-MS/s Pipelined-SAR ADC With PVT-Insensitive and Gain-Folding Dynamic Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(8): 2602-2611 (2020)
2010 – 2019
- 2019
- [j1]Shubin Liu, Haolin Han, Ruixue Ding:
Energy-Efficient Switching Scheme with 93.41% Reduction in Capacitor Area for SAR ADC. J. Circuits Syst. Comput. 28(13): 1930010:1-1930010:16 (2019)
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