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Michel Robert
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2020 – today
- 2023
- [j16]Abdoulaye Gamatié
, Thomas Leduc
A model-based approach to addressing energy demand in sustainable urban systems. Sustain. Comput. Informatics Syst. 37: 100844 (2023) - [j15]Marcos de Melo da Silva, Abdoulaye Gamatié
Optimization of Data and Energy Migrations in Mini Data Centers for Carbon-Neutral Computing. IEEE Trans. Sustain. Comput. 8(1): 68-81 (2023)
2010 – 2019
- 2017
- [c74]Rapeepat Ratasuk, Nitin Mangalvedhe, Zhilan Xiong, Michel Robert, David Bhatoolaul:
Enhancements of narrowband IoT in 3GPP Rel-14 and Rel-15. CSCN 2017: 60-65 - 2016
- [c73]Rapeepat Ratasuk, Nitin Mangalvedhe, Yanji Zhang, Michel Robert, Jussi-Pekka Koskinen:
Overview of narrowband IoT in LTE Rel-13. CSCN 2016: 164-170 - [c72]Anastasiia Butko, Florent Bruguier
Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration. MCSoC 2016: 201-208 - [c71]Rapeepat Ratasuk, Nitin Mangalvedhe, Jorma Kaikkonen, Michel Robert:
Data Channel Design and Performance for LTE Narrowband IoT. VTC Fall 2016: 1-5 - 2015
- [c70]Anastasiia Butko, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel Robert
Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE Architectures. ISVLSI 2015: 551-556 - 2013
- [j14]Luciano Ost
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach. ACM Trans. Embed. Comput. Syst. 12(3): 75:1-75:22 (2013) - [c69]Rafael Garibotti
Simultaneous multithreading support in embedded distributed memory MPSoCs. DAC 2013: 83:1-83:7 - 2012
- [j13]Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, François Grize, Michel Robert
A Mobile Computing Framework for Pervasive Adaptive Platforms. Int. J. Distributed Sens. Networks 8 (2012) - [j12]Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert
Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 573-577 (2012) - [c68]Rémi Busseuil, Luciano Ost
Remote Execution in Distributed Memory MPSoC. FCCM 2012: 121-124 - 2011
- [j11]Gabriel Marchesan Almeida, Rémi Busseuil, Luciano Ost
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip. IEEE Embed. Syst. Lett. 3(3): 77-80 (2011) - [j10]Bettina Rebaud, Marc Belleville, Edith Beigné
Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. Microelectron. J. 42(5): 718-732 (2011) - [c67]Rémi Busseuil, Lyonel Barthe, Gabriel Marchesan Almeida, Luciano Ost
Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration. ReConFig 2011: 357-362 - [c66]Luciano Ost
Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling. ReCoSoC 2011: 1-8 - [c65]Luciano Ost
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework. SBCCI 2011: 185-190 - [p1]Lionel Torres, Pascal Benoit, Gilles Sassatelli, Michel Robert, Fabien Clermidy, Diego Puschini:
An Introduction to Multi-Core System on Chip - Trends and Challenges. Multiprocessor System-on-Chip 2011: 1-21 - 2010
- [j9]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert
Run-time mapping for dynamic reconfiguration management in embedded systems. Int. J. Embed. Syst. 4(3/4): 276-291 (2010) - [c64]Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
Differential Power Analysis enhancement with statistical preprocessing. DATE 2010: 1301-1304 - [c63]Gabriel Marchesan Almeida, Sameer Varyani, Rémi Busseuil, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
Providing Better Multi-processor Systems-on-Chip Resources Utilization by Means of Using a Control-Loop Feedback Mechanism. ReConFig 2010: 382-387 - [c62]François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert:
Spatial EM jamming: A countermeasure against EM Analysis? VLSI-SoC 2010: 105-110 - [c61]Rémi Busseuil, Gabriel Marchesan Almeida, Luciano Ost
Adaptation Strategies in Multiprocessors System on Chip. VLSI-SoC (Selected Papers) 2010: 233-257
2000 – 2009
- 2009
- [j8]Gabriel Marchesan Almeida, Gilles Sassatelli, Pascal Benoit, Nicolas Saint-Jean, Sameer Varyani, Lionel Torres, Michel Robert
An Adaptive Message Passing MPSoC Framework. Int. J. Reconfigurable Comput. 2009: 242981:1-242981:20 (2009) - [c60]Olivier Brousse, Jérémie Guillot, Gilles Sassatelli, Thierry Gil, Michel Robert
A Bio-Inspired Agent Framework for Hardware Accelerated Distributed Pervasive Applications. AHS 2009: 415-422 - [c59]Olivier Brousse, Jérémie Guillot, Thierry Gil, François Grize, Gilles Sassatelli, Juan Manuel Moreno, Jordi Madrenas, Alessandro E. P. Villa
JubiTool: Unified design flow for the Perplexus SIMD hardware accelerator. IEEE Congress on Evolutionary Computation 2009: 2070-2075 - [c58]Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639 - [c57]Bettina Rebaud, Marc Belleville, Edith Beigné
Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. PATMOS 2009: 266-275 - [c56]Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC 2009: 135-155 - 2008
- [c55]Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert:
A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. DELTA 2008: 107-110 - [c54]Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
Bio-inspiration helps computers: A new machine. FPL 2008: 697-698 - [c53]Olivier Brousse, Gilles Sassatelli, Thierry Gil, Yoann Guillemenet, Michel Robert, François Grize, Eduardo Sanchez, Yann Thoma, Andres Upegui, Juan Manuel Moreno, Jordi Madrenas:
BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications. GEM 2008: 115-121 - [c52]Olivier Brousse, Gilles Sassatelli, Thierry Gil, Michel Robert, François Grize, Eduardo Sanchez, Andres Upegui, Yann Thoma:
The Perplexus Programming Framework: Combining Bio-inspiration and Agent-Oriented Programming for the Simulation of Large Scale Complex Systems. ICES 2008: 402-407 - [c51]Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert:
MPI-Based Adaptive Task Migration Support on the HS-Scale System. ISVLSI 2008: 105-110 - [c50]Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert:
Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. ISVLSI 2008: 310-315 - [c49]Bettina Rebaud, Marc Belleville, Christian Bernard, Zeqin Wu, Michel Robert
Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. ISVLSI 2008: 316-321 - [c48]Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
Triple Rail Logic Robustness against DPA. ReConFig 2008: 415-420 - [c47]Rafael Soares, Ney Laert Vilar Calazans
Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198 - 2007
- [c46]Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes
Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. FCCM 2007: 295-296 - [c45]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Moraes
A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA. IPDPS 2007: 1-8 - [c44]Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. ISVLSI 2007: 21-28 - [c43]Alin Razafindraibe, Michel Robert
Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. PATMOS 2007: 340-351 - [c42]Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert:
HS Scale: A run-time adaptable MP-SoC architecture. ReCoSoC 2007: 39-46 - [c41]Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. ICSAMOS 2007: 88-95 - [c40]Alin Razafindraibe, Michel Robert, Philippe Maurine:
Improvement of dual rail logic as a countermeasure against DPA. VLSI-SoC 2007: 270-275 - 2006
- [c39]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert
A Leak Resistant Architecture Against Side Channel Attacks. FPL 2006: 1-4 - [c38]Daniel Mesquita, Benoît Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Fernando Gehm Moraes
A Leak Resistant SoC to Counteract Side Channel Attacks. SoC 2006: 1-4 - [c37]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker:
Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI 2006: 251-256 - [c36]Alin Razafindraibe, Michel Robert, Philippe Maurine:
Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. PATMOS 2006: 634-644 - [c35]Benoît Badrignans, Daniel Mesquita, Jean-Claude Bajard, Lionel Torres, Gilles Sassatelli, Michel Robert:
A Parallel and Secure Architecture for Asymmetric Cryptography. ReCoSoC 2006: 220-224 - [c34]Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin:
Security evaluation of dual rail logic against DPA attacks. VLSI-SoC 2006: 181-186 - 2005
- [j7]Alin Razafindraibe, Michel Robert, Philippe Maurine:
Compact and Secured Primitives for the Design of Asynchronous Circuits. J. Low Power Electron. 1(1): 20-26 (2005) - [j6]Blaise Conrard, Jean-Marc Thiriet, Michel Robert:
Distributed system design based on dependability evaluation: a case study on a pilot thermal process. Reliab. Eng. Syst. Saf. 88(1): 109-119 (2005) - [j5]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Tech. Sci. Informatiques 24(6): 725-755 (2005) - [c33]F. Gensolen, Guy Cathébras, Lionel Martin, Michel Robert:
An Image Sensor with Global Motion Estimation for Micro Camera Module. ACIVS 2005: 713-721 - [c32]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA 2005: 270 - [c31]Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL 2005: 703-706 - [c30]Laurent Latorre, Yves Bertrand, Michel Robert, Marie-Lise Flottes:
Test Engineering Education in Europe - The CRTC experience through the EuNICE-Test project. EDUTECH 2005: 63-77 - [c29]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS 2005 - [c28]Alin Razafindraibe, Michel Robert
A Method to Design Compact Dual-rail Asynchronous Primitives. PATMOS 2005: 571-580 - [c27]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes:
A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 - [c26]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes
Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 - [c25]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Michel Robert, Guy Cathébras, Gilles Sassatelli, Fernando Gehm Moraes:
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks. VLSI-SoC 2005: 317-330 - 2004
- [c24]Olivier Omedes, Michel Robert, Mohammed Ramdani:
A flexibility aware budgeting for hierarchical flow timing closure. ICCAD 2004: 261-266 - [c23]A. Landrault, Nadine Azémard, Philippe Maurine, Michel Robert
Design Optimization with Automated Cell Generation. PATMOS 2004: 722-731 - [c22]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 - 2003
- [c21]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 - [c20]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 - [c19]Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert:
Are coarse grain reconfigurable architectures suitable for cryptography? VLSI-SOC 2003: 276-281 - 2002
- [j4]Jean-Marc Thiriet, Michel Robert, Pentti Lappalainen, Michael H. W. Hoffmann, Maria João Martins, Anselmo Seoane:
Toward a Pan-European virtual university in electrical and information engineering. IEEE Trans. Educ. 45(2): 152-160 (2002) - [c18]Alexis Landrault, Ludovic Pellier, Alexandre Richard, Christian Jay, Michel Robert, Daniel Auvergne:
Transistor Level Synthesis Dedicated to Fast I.P. Prototyping. PATMOS 2002: 156-166 - [c17]Christel-Loïc Tisse, Lionel Martin, Lionel Torres, Michel Robert:
Iris recognition system for person identification. PRIS 2002: 186-199 - [e1]Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes:
SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01), December 3-5, 2001, Montpellier, France. IFIP Conference Proceedings 218, Kluwer 2002, ISBN 1-4020-7148-5 [contents] - 2001
- [c16]Camille Diou
An embedded core for the 2D wavelet transform. ETFA (2) 2001: 179-186 - [c15]Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy:
Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC 2001: 63-74 - 2000
- [c14]Camille Diou
A Wavelet Core for Video Processing. ICIP 2000: 395-398 - [c13]Rolf Fredi Molz, Paulo Martins Engel, Fernando Gehm Moraes, Lionel Torres, Michel Robert:
Design of a Classification System for Rectangular Shapes Using a Co-Design Environment. SBCCI 2000: 281-288
1990 – 1999
- 1999
- [c12]Camille Diou, Lionel Torres, Michel Robert:
Implementation of a Wavelet Transform Architecture for Image Processing. VLSI 1999: 101-112 - [c11]Augusto Gallegos, Philippe Silvestre, Michel Robert, Daniel Auvergne:
RF Interface Design Using Mixed-Mode Methodology. VLSI 1999: 326-333 - [c10]S. Raimbault, Gilles Sassatelli, Gamille Cambon, Michel Robert, Sébastien Pillement, Lionel Torres:
Embedded Systems Design And Verification: Reuse Oriented Prototyping Methodologies. VLSI 1999: 407-414 - [c9]Fernando Moraes, Michel Robert, Daniel Auvergne:
A Virtual CMOS Library Approach for East Layout Synthesis. VLSI 1999: 415-426 - [c8]Michel Robert:
Increasing test coverage in a VLSI design course. ITC 1999: 1135 - [c7]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping 1999: 87- - 1998
- [j3]Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine:
A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real Time Imaging 4(3): 181-191 (1998) - 1996
- [c6]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 - 1995
- [c5]Jean Michel Daga, Michel Robert, Daniel Auvergne:
Delay modelling improvement for low voltage applications. EURO-DAC 1995: 216-221 - 1994
- [c4]Michel Robert, Patrick Gorria, Johel Mitéran, S. Turgis:
Design of a Real Time Geometric Classifier. EDAC-ETC-EUROASIC 1994: 656 - [c3]Michel Robert, Lionel Torres, Fernando Moraes
Influence of Locig Block Layout Architecture on FPGA Performance. FPL 1994: 34-44 - 1993
- [j2]Denis Deschacht, Michel Robert
Post-layout timing simulation of CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(8): 1170-1177 (1993) - 1991
- [j1]D. Navarro, A. Roy, Michel Robert, Denis Deschacht, Daniel Auvergne:
TVA: A timing verifier with analytic temporal modelling. Microprocessing and Microprogramming 32(1-5): 637-644 (1991) - [c2]Daniel Auvergne, Nadine Azémard, V. Bonzom, Denis Deschacht, Michel Robert:
Formal sizing rules of CMOS circuits. EURO-DAC 1991: 96-100 - 1990
- [c1]Denis Deschacht, P. Pinede, Michel Robert, Daniel Auvergne:
Path runner: an accurate and fast timing analyser. EURO-DAC 1990: 529-533
Coauthor Index
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