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Jean Michel Daga
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2010 – 2019
- 2010
- [c17]Christian Caillat, Eric Carman, Jean Michel Daga, Cedric Ouvrard, Philippe Bauser:
A statistical design method for Giga Bit memory arrays and beyond. ICECS 2010: 970-973
2000 – 2009
- 2009
- [j3]Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel:
A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash. J. Electron. Test. 25(2-3): 127-144 (2009) - 2008
- [c16]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Hierarchical Code Correction and Reliability Management in Embedded nor Flash Memories. ETS 2008: 84-90 - 2007
- [c15]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Evaluation of design for reliability techniques in embedded flash memories. DATE 2007: 1593-1598 - [c14]Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli:
Architecture for Highly Reliable Embedded Flash Memories. DDECS 2007: 75-80 - [c13]Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel:
Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories. ETS 2007: 77-84 - [c12]Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga:
A concurrent approach for testing address decoder faults in eFlash memories. ITC 2007: 1-10 - [c11]Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel:
Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window. VTS 2007: 47-52 - 2006
- [c10]Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel:
An Overview of Failure Mechanisms in Embedded Flash Memories. VTS 2006: 108-113 - 2005
- [c9]Emmanuel Racape, Jean Michel Daga:
A PMOS-switch based charge pump, allowing lost cost implementation on a CMOS standard process. ESSCIRC 2005: 77-80 - 2004
- [c8]Jean Michel Daga, Caroline Papaix, Marylene Combe, Emmanuel Racape, Vincent Sialelli:
Embedded EEPROM Speed Optimization Using System Power Supply Resources. PATMOS 2004: 381-391 - 2003
- [j2]Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne:
Design Techniques for EEPROMs Embedded in Portable Systems on Chips. IEEE Des. Test Comput. 20(1): 68-75 (2003) - [c7]Jean Michel Daga, Caroline Papaix, Emmanuel Racape, Marylene Combe, Vincent Sialelli, Jeanine Guichaoua:
A 40ns Random Access Time Low Voltage 2Mbits EEPROM Memory for Embedded Applications. MTDT 2003: 81-85 - 2002
- [c6]Jean Michel Daga:
Test and Repair of Embedded Flash Memories. ITC 2002: 1219 - [c5]Caroline Papaix, Jean Michel Daga:
A New Single Ended Sense Amplifier for Low Voltage Embedded EEPROM Non Volatile Memories. MTDT 2002: 149-156 - 2000
- [c4]Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne:
Design Techniques for Embedded EEPROM Memories in Portable ASIC and ASSP Solutions. MTDT 2000: 39-46
1990 – 1999
- 1999
- [j1]Jean Michel Daga, Daniel Auvergne:
A comprehensive delay macro modeling for submicrometer CMOS logics. IEEE J. Solid State Circuits 34(1): 42-55 (1999) - 1998
- [c3]Jean Michel Daga, E. Ottaviano, Daniel Auvergne:
Temperature Effect on Delay for Low Voltage Applications. DATE 1998: 680-685 - 1997
- [c2]S. Turgis, Jean Michel Daga, Josep M. Portal, Daniel Auvergne:
Internal power modelling and minimization in CMOS inverters. ED&TC 1997: 603-608 - 1995
- [c1]Jean Michel Daga, Michel Robert, Daniel Auvergne:
Delay modelling improvement for low voltage applications. EURO-DAC 1995: 216-221
Coauthor Index
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