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Kee-Won Kwon
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Journal Articles
- 2023
- [j18]Tae-Bin Kim, Hyun-Jin Kim, Kee-Won Kwon:
Fast and Efficient Offset Compensation by Noise-Aware Pre-Charge and Operation of DRAM Bit Line Sense Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1326-1330 (2023) - 2021
- [j17]Jong-Moon Choi, Do-Wan Kwon, Je-Joong Woo, Eun-Je Park, Kee-Won Kwon:
Implementation of an On-Chip Learning Neural Network IC Using Highly Linear Charge Trap Device. IEEE Trans. Circuits Syst. I Regul. Pap. 68(7): 2863-2875 (2021) - 2020
- [j16]Xuefan Jin, Woosung Park, Dong-Seok Kang, Youngjun Ko, Kee-Won Kwon, Jung-Hoon Chun:
A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth. IEEE J. Solid State Circuits 55(10): 2724-2733 (2020) - 2019
- [j15]Cheol Kim, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon:
Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 605-615 (2019) - [j14]Jisu Min, Cheol Kim, Sung-Yong Kim, Kee-Won Kwon:
A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1840-1850 (2019) - 2017
- [j13]Soon-Chan Kwon, Jong-Min Baek, Jong-Moon Choi, Kee-Won Kwon:
A Fast and Reliable Cross-Point Three-State/Cell ReRAM. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1622-1631 (2017) - 2014
- [j12]Kyoung-Ho Kim, Jun-Han Bae, Young-Hyun Jun, Kee-Won Kwon:
A 5-Gbit/s CDR circuit with 1.4 mW multi-PFD phase rotating PLL. IEICE Electron. Express 11(24): 20140828 (2014) - [j11]Seok Kim, Youngkyun Jeong, Mira Lee, Kee-Won Kwon, Jung-Hoon Chun:
A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 213-225 (2014) - [j10]Seok Kim, Eun-Young Jin, Kee-Won Kwon, Jintae Kim, Jung-Hoon Chun:
A 6.4-Gb/s Voltage-Mode Near-Ground Receiver With a One-Tap Data and Edge DFE. IEEE Trans. Circuits Syst. II Express Briefs 61-II(6): 438-442 (2014) - [j9]Joung-Yeal Kim, Su-Jin Park, Kee-Won Kwon, Bai-Sun Kong, Joo-Sun Choi, Young-Hyun Jun:
CMOS Charge Pump With No Reversion Loss and Enhanced Drivability. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1441-1445 (2014) - 2013
- [j8]Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon:
An all-digital PLL with supply insensitive digitally controlled oscillator. IEICE Electron. Express 10(5): 20120902 (2013) - [j7]June-Hee Lee, Sang-Hoon Kim, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun:
A fully digital clock and data recovery with fast frequency offset acquisition technique for MIPI LLI applications. IEICE Electron. Express 10(10): 20130178 (2013) - [j6]Sang-Yun Kim, Jong-Min Baek, Dong-Jin Seo, Jae-Koo Park, Jung-Hoon Chun, Kee-Won Kwon:
Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 776-780 (2013) - 2012
- [j5]Jong-Min Baek, Dong-Jin Seo, Jung-Hoon Chun, Kee-Won Kwon:
A Dual Charge Pump for Quiescent Touch Sensor Power Supply. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 780-784 (2012) - 2011
- [j4]Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Seok Kim, Kee-Won Kwon:
A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 632-636 (2011) - 2010
- [j3]Kyoung-Su Lee, Jung-Hoon Chun, Kee-Won Kwon:
A low power CMOS compatible embedded EEPROM for passive RFID tag. Microelectron. J. 41(10): 662-668 (2010) - [j2]Jong-Min Baek, Jung-Hoon Chun, Kee-Won Kwon:
A Power-Efficient Voltage Upconverter for Embedded EEPROM Application. IEEE Trans. Circuits Syst. II Express Briefs 57-II(6): 435-439 (2010) - 2004
- [j1]Jae-Yoon Sim, Kee-Won Kwon, Ki-Chul Chun:
Charge-transferred presensing, negatively precharged word-line, and temperature-insensitive power-up schemes for low-voltage DRAMs. IEEE J. Solid State Circuits 39(4): 694-703 (2004)
Conference and Workshop Papers
- 2024
- [c29]Jeong-In Choi, Seo-Yoon Lee, Chan-Woong Park, Jin-Gon Oh, Ji Hoon Kang, Kee-Won Kwon:
Highly Linear Charging/Discharging of Charge Trap FET Using Regulated Single Pulse for Neural Accelerator. ICEIC 2024: 1-4 - [c28]Seungkyu Kim, Kihun Ok, Kee-Won Kwon:
Si Bridge With Chessboard Patterned Interconnect (CPI): Enabling High Density, High Efficiency Heterogeneous Integration. ICEIC 2024: 1-4 - [c27]Seung-Mo Noh, Seungkyu Kim, Seo-Yoon Lee, Kee-Won Kwon:
A Highly-Sensitive and Compact Interconnect Delay Monitoring Circuit for 3-Dimensional System Packages. ICEIC 2024: 1-4 - 2022
- [c26]Su-Yeon Doo, Kee-Won Kwon:
Dynamic Power Reduction of TCAM Using Selective Precharging of Match Lines. IEEE Big Data 2022: 6633-6635 - [c25]Young-Taek Ryu, Kee-Won Kwon:
A 6.23-bit FG-based Neuromorphic Synaptic Device with Extended Input Range by Linearity Improvement. ICEIC 2022: 1-4 - 2021
- [c24]Hwan-Jin Joo, Kee-Won Kwon:
Binary/Ternary Vector Matrix Multiplier with 3T-2R CBRAM Cell. ISOCC 2021: 73-74 - [c23]Jin-Young Hwang, Kee-Won Kwon:
A Non-linear Input Converter Inversely Pre-distorted Against Nonlinear Behavior of FG-based Neuromorphic Synaptic Devices. ISOCC 2021: 409-410 - [c22]Se-Won Yun, Young-Taek Ryu, Kee-Won Kwon:
High Linearity Vector Matrix Multiplier using Bootstrapping and Pre-Emphasis Charging of Non-linear Charge-Trap Synaptic Devices. MWSCAS 2021: 441-444 - 2020
- [c21]Eun-Je Park, Jong-Moon Choi, Do-Wan Kwon, Je-Joong Woo, Kee-Won Kwon:
A 35x10 Charge-Trap Synaptic Memory for 57xMatrix Recognition. AICAS 2020: 99-102 - [c20]Segi Lee, Sugil Lee, Jongeun Lee, Jong-Moon Choi, Do-Wan Kwon, Seung-Kwang Hong, Kee-Won Kwon:
Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network Processor. ACM Great Lakes Symposium on VLSI 2020: 427-432 - [c19]Sang-Won Kim, Jae-Hyuk Yang, Eun-Je Park, Jong-Moon Choi, Kee-Won Kwon:
A High Efficiency Variable Stage and Frequency Charge Pump for Wide Range ISPP. ISCAS 2020: 1-5 - [c18]Do-Yeon Kim, Kee-Won Kwon:
Smart Adaptive Refresh for Optimum Refresh Interval Tracking using in-DRAM ECC. MWSCAS 2020: 822-825 - 2019
- [c17]Xuefan Jin, Dong-Seok Kang, Youngjun Ko, Kee-Won Kwon, Jung-Hoon Chun:
A 4-GHz Sub-harmonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injection Timing and Pulsewidth. A-SSCC 2019: 83-86 - [c16]Dojong Cheon, Kee-Won Kwon:
Low Power 3T-2R Non-Volatile TCAM Cell with Dual Match-line. ICEIC 2019: 1-2 - [c15]Byoungkon Jo, Kee-Won Kwon:
High performance 4T-2R Non-Volatile TCAM with NMOS Booster. ICEIC 2019: 1-2 - [c14]Yong-Hyun Kim, Jong-Moon Choi, Je-Joong Woo, Eun-Je Park, Sang-Won Kim, Kee-Won Kwon:
A 16x16 Programmable Anlaog Vector Matrix Multiplier using CMOS compatible Floating gate device. ICEIC 2019: 1-4 - [c13]Je-Joong Woo, Jong-Moon Choi, Kee-Won Kwon:
CMOS-Compatible Learning Device for Neuromorphic Synapse Application using Adjustable Hot Carrier Injections. MWSCAS 2019: 57-60 - 2018
- [c12]Cheol Kim, Rak-Joo Sung, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon:
Low Power Search Engine using Non-volatile Memory based TCAM with Priority Encoding and Selective Activation of Search Line and Match Line. ISCAS 2018: 1-4 - 2017
- [c11]Sung-Gi Ahn, Kee-Won Kwon:
Local NOR and global NAND match-line architecture for high performance CAM. MWSCAS 2017: 707-710 - 2016
- [c10]Sangheon Lee, Jeonghwan Song, Changhyuk Seong, Jiyong Woo, Jong-Moon Choi, Soon-Chan Kwon, Ho-Joon Kim, Hyun-Suk Kang, Soo Gil Kim, Hoe Gwon Jung, Kee-Won Kwon, Hyunsang Hwang:
Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier. VLSI Circuits 2016: 1-2 - 2015
- [c9]Sung-Yong Kim, Xuefan Jin, Jung-Hoon Chun, Kee-Won Kwon:
A digital DLL with 4-cycle lock time and 1/4 NAND-delay accuracy. A-SSCC 2015: 1-4 - 2014
- [c8]Seok Kim, Jung-Myung Kang, Xuefan Jin, Se-Ung Park, Ja-Hoon Jin, Kee-Won Kwon, Jung-Hoon Chun, Jung Ho Lee, Jun Young Park, Dae Young Lee:
A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfaces. ISCAS 2014: 1488-1491 - 2013
- [c7]June-Hee Lee, Sang-Hoon Kim, Jongshin Shin, Dong-Chul Choi, Kee-Won Kwon, Jung-Hoon Chun:
A tracked oversampling digital data recovery for Low Latency, fast acquisition, and high jitter tolerance. MWSCAS 2013: 1027-1030 - 2012
- [c6]Jae-Wook Kwon, Xuefan Jin, Gyoo-Cheol Hwang, Jung-Hoon Chun, Kee-Won Kwon:
A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interface. ESSCIRC 2012: 454-457 - [c5]Youngkyun Jeong, Yoon-Chul Choi, Eun-Ji Choi, Seogheon Ham, Kee-Won Kwon, Young-Hyun Jun, Jung-Hoon Chun:
0.37mW/Gb/s low power SLVS transmitter for battery powered applications. ISCAS 2012: 1955-1958 - [c4]Sung-Pil Choi, Gyoo-Cheol Hwang, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun:
A low-power two-line inversion method for driving LCD panels. ISCAS 2012: 1995-1998 - [c3]Jun-Han Bae, Kyoung-Ho Kim, Seok Kim, Kee-Won Kwon, Jung-Hoon Chun:
A low-power dual-PFD phase-rotating PLL with a PFD controller for 5Gb/s serial links. ISCAS 2012: 2159-2162 - 2011
- [c2]Seong-Won Kang, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon:
A study on accelerated built-in self test of multi-Gb/s high speed interfaces. NESEA 2011: 1-4 - 2006
- [c1]Kyu-Hyoun Kim, Uksong Kang, Hoeju Chung, Dukha Park, Woo-Seop Kim, Young-Chan Jang, Moon-Sook Park, Hoon Lee, Jinyoung Kim, Jung Sunwoo, Hwan-Wook Park, Hyun-Kyung Kim, Su-Jin Chung, Jae-Kwan Kim, Hyung-Seuk Kim, Kee-Won Kwon, Young-Taek Lee, Joo-Sun Choi, Changhyun Kim:
An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme. ISSCC 2006: 527-536
Coauthor Index
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