default search action
Saeed Safari
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j40]Seyed Ali Kashani Gharavi
, Saeed Safari
Performance Improvement of Processor Through Configurable Approximate Arithmetic Units in Multicore Systems. IEEE Access 12: 43907-43917 (2024) - [j39]Reza Zendegani
AMCAL: Approximate Multiplier With the Configurable Accuracy Levels for Image Processing and Convolutional Neural Network. IEEE Access 12: 94135-94151 (2024) - [j38]Nastaran Jannesar
SSTE: Syllable-Specific Temporal Encoding to FORCE-learn audio sequences with an associative memory approach. Neural Networks 177: 106368 (2024) - 2023
- [j37]Behrooz Abdoli
A Hardware-Friendly Real-Time Implementation of the Auditory Attention Based on a Novel Spiking Winner-Take-All Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2566-2579 (2023) - 2022
- [j36]Zohreh Naghibi
Adjoint recurrent neural network technique for nonlinear electronic component modeling. Int. J. Circuit Theory Appl. 50(4): 1119-1129 (2022) - [j35]Amirreza Nekooei, Saeed Safari:
Compression of Deep Neural Networks based on quantized tensor decomposition to implement on reconfigurable hardware platforms. Neural Networks 150: 350-363 (2022) - 2021
- [j34]Rasoul Farjaminezhad
Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits. Microelectron. J. 112: 104993 (2021) - [j33]Rasoul Farjaminezhad
Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network. Microelectron. J. 117: 105249 (2021) - [i1]Kaveh Akbarzadeh-Sherbaf, Mikaeel Bahmani, Danial Ghiaseddin, Saeed Safari, AbdolHossein Vahabie:
A Novel Approximate Hamming Weight Computing for Spiking Neural Networks: an FPGA Friendly Architecture. CoRR abs/2104.14594 (2021) - 2020
- [j32]Behrooz Abdoli, Saeed Safari:
A reconfigurable real-time neuromorphic hardware for spiking winner-take-all network. Int. J. Circuit Theory Appl. 48(12): 2141-2152 (2020) - [j31]Kaveh Akbarzadeh-Sherbaf
A digital hardware implementation of spiking neural networks with binary FORCE training. Neurocomputing 412: 129-142 (2020) - [j30]Alireza Yazdanpanah, Sohrab Sajadimanesh, Saeed Safari:
EREER: Energy-aware register file and execution unit using exploiting redundancy in GPGPUs. Microprocess. Microsystems 77: 103176 (2020)
2010 – 2019
- 2019
- [j29]Mohammad Saeed Jahangiry
A memory-efficient canonical data structure for decimal floating point arithmetic systems modeling and verification. Turkish J. Electr. Eng. Comput. Sci. 27(1): 471-483 (2019) - [j28]Ali Hajian, Saeed Safari:
Modeling Soft Error Propagation in Near-Threshold Combinational Circuits Using Neural Networks. J. Electron. Test. 35(3): 401-412 (2019) - [j27]Zohreh Naghibi
Dynamic behavioral modeling of nonlinear circuits using a novel recurrent neural network technique. Int. J. Circuit Theory Appl. 47(7): 1071-1085 (2019) - [j26]Alireza Namazi
SORT: Semi Online Reliable Task Mapping for Embedded Multi-Core Systems. ACM Trans. Model. Perform. Evaluation Comput. Syst. 4(2): 11:1-11:25 (2019) - [j25]Alireza Namazi, Saeed Safari
CMV: Clustered Majority Voting Reliability-Aware Task Scheduling for Multicore Real-Time Systems. IEEE Trans. Reliab. 68(1): 187-200 (2019) - 2018
- [j24]Ehsan Ghadaksaz
Storage capacity for EDF-ASAP algorithm in energy-harvesting systems with periodic implicit deadline hard real-time tasks. J. Syst. Archit. 89: 10-17 (2018) - [j23]Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi
A Majority-Based Reliability-Aware Task Mapping in High-Performance Homogenous NoC Architectures. ACM Trans. Embed. Comput. Syst. 17(1): 28:1-28:31 (2018) - [c46]Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi, Masoud Daneshtalab:
LRTM: Life-time and Reliability-aware Task Mapping Approach for Heterogeneous Multi-core Systems. NoCArc@MICRO 2018: 1-6 - 2017
- [c45]Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi
LORAP: Low-Overhead Power and Reliability-Aware Task Mapping Based on Instruction Footprint for Real-Time Applications. DSD 2017: 364-367 - 2016
- [j22]Muhammad Amin Araghizadeh, Peyman Teymoori
An efficient medium access control protocol for WSN-UAV. Ad Hoc Networks 52: 146-159 (2016) - [j21]Hoda Mahdiani, Saeed Safari
Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. Integr. 53: 14-26 (2016) - [j20]Mahdi Mosaffa, Siamak Mohammadi
Statistical analysis of asynchronous pipelines in presence of process variation using formal models. Integr. 55: 98-117 (2016) - [j19]Ali Azarpeyvand
Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor. Microprocess. Microsystems 42: 113-126 (2016) - [j18]Mehdi Kamal, Qing Xie, Massoud Pedram, Ali Afzali-Kusha, Saeed Safari
An efficient temperature dependent hot carrier injection reliability simulation flow. Microelectron. Reliab. 57: 10-19 (2016) - [j17]Bahareh J. Farahani
PVTA-aware approximate custom instruction extension technique: A cross-layer approach. Microelectron. Reliab. 63: 267-277 (2016) - [j16]Fatemeh Pouyan, Ali Azarpeyvand
Reliability aware throughput management of chip multi-processor architecture via thread migration. J. Supercomput. 72(4): 1363-1380 (2016) - [j15]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions. ACM Trans. Design Autom. Electr. Syst. 21(2): 28:1-28:25 (2016) - [c44]Reza Zendegani, Mehdi Kamal, Arash Fayyazi, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram:
SEERAD: A high speed yet energy-efficient rounding-based approximate divider. DATE 2016: 1481-1484 - [c43]Alireza Namazi, Meisam Abdollahi, Saeed Safari
A Majority-Based Reliability-Aware Task-Mapping in High-Performance Homogenous NoC Architectures. DSD 2016: 479-486 - [c42]Alireza Namazi, Meisam Abdollahi, Saeed Safari
Reliability-Aware Task Scheduling using Clustered Replication for Multi-core Real-Time systems. NoCArc@MICRO 2016: 45-50 - 2015
- [j14]Fatemeh Pouyan, Ali Azarpeyvand
Reliability-aware simultaneous multithreaded architecture using online architectural vulnerability factor estimation. IET Comput. Digit. Tech. 9(2): 124-133 (2015) - [j13]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
Design of NBTI-resilient extensible processors. Integr. 49: 22-34 (2015) - [j12]Bahar J. Farahani
A cross-layer SER analysis in the presence of PVTA variations. Microelectron. Reliab. 55(7): 1013-1027 (2015) - [j11]Bahareh J. Farahani
Cross-layer custom instruction selection to address PVTA variations and soft error. Microelectron. Reliab. 55(11): 2423-2438 (2015) - [j10]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs. ACM Trans. Embed. Comput. Syst. 14(4): 72:1-72:23 (2015) - [c41]Bahar J. Farahani
A cross-layer approach to online adaptive reliability prediction of transient faults. DFTS 2015: 215-220 - 2014
- [j9]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors. ACM J. Emerg. Technol. Comput. Syst. 10(3): 19:1-19:25 (2014) - [j8]Amir Yazdanbakhsh
Implementation-aware selection of the custom instruction set for extensible processors. Microprocess. Microsystems 38(7): 681-691 (2014) - [c40]Bahareh J. Farahani
An instance-based SER analysis in the presence of PVTA variations. DFT 2014: 287-292 - [c39]M. H. Haghbayan, Bijan Alizadeh, Payman Behnam, Saeed Safari
Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism. VLSID 2014: 80-85 - 2013
- [j7]Fouzhan Hosseini, Amir Fijany, Saeed Safari
Fast implementation of dense stereo vision algorithms on a highly parallel SIMD architecture. J. Real Time Image Process. 8(4): 421-435 (2013) - [j6]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
Considering the effect of process variations during the ISA extension design flow. Microprocess. Microsystems 37(6-7): 713-724 (2013) - [c38]Bahareh J. Farahani
Reliability-aware cross-layer custom instruction screening. DDECS 2013: 258-262 - [c37]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
Capturing and mitigating the NBTI effect during the design flow for extensible processors. DTIS 2013: 94-97 - [c36]Saeed Safari, Alberto Castellazzi
Performance evaluation of normaly-off SiC JFET in matrix converter without antiparrallel diodes. IECON 2013: 1815-1820 - 2012
- [c35]Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram:
An architecture-level approach for mitigating the impact of process variations on extensible processors. DATE 2012: 467-472 - [c34]M. H. Haghbayan, Saeed Safari
Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST. DDECS 2012: 42-45 - [c33]Mohammadreza Najafi, Saeed Safari
Soft Error Analysis on Communication Channels in On-Chip Communication Networks. DSD 2012: 852-857 - [c32]Reza Nakhjavani, Ali Shahabi, Saeed Safari
A novel graceful degradable routing algorithm for 3D on-chip networks. INA-OCMC@HiPEAC 2012: 17-20 - [c31]Mehdi Kamal, Qing Xie, Massoud Pedram, Ali Afzali-Kusha, Saeed Safari
An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits. ICCD 2012: 352-357 - [c30]Safa Yaghini Bonabi, Hassan Asgharian, Reyhaneh Bakhtiari
FPGA Implementation of a Cortical Network Based on the Hodgkin-Huxley Neuron Model. ICONIP (1) 2012: 243-250 - [c29]Safa Yaghini Bonabi, Hassan Asgharian, Reyhaneh Bakhtiari, Saeed Safari, Majid Nili Ahmadabadi:
FPGA Implementation of Hodgkin-Huxley Neuron Model. IJCCI 2012: 522-528 - [c28]Atieh Lotfi, Arash Bayat, Saeed Safari
Architectural vulnerability aware checkpoint placement in a multicore processor. IOLTS 2012: 118-120 - [c27]Muhammad Amin Araghizadeh, Nasser Yazdani, Saeed Safari
DEED: Dynamic energy efficient distributed cluster forming algorithm for Wireless Sensors Network. IST 2012: 776-781 - 2011
- [c26]Sahar Abbaspour Seyyedi, Mehdi Kamal, Hamid Noori
Securing Embedded Processors against Power Analysis Based Side Channel Attacks Using Reconfigurable Architecture. EUC 2011: 255-260 - 2010
- [j5]Amin Farmahini Farahani, Shervin Vakili
Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. Eng. Appl. Artif. Intell. 23(2): 177-187 (2010) - [c25]Amirali Ghofrani, Fatemeh Javaheri, Saeed Safari
Automatic selection of efficient observability points in combinational gate level circuits using particle swarm optimization. SoC 2010: 111-114 - [c24]Ali Khalili, Amir Fijany, Fouzhan Hosseini, Saeed Safari
Fast Parallel Model Estimation on the Cell Broadband Engine. ISVC (2) 2010: 469-480 - [c23]Farshad Firouzi, Mostafa E. Salehi
Reliability-Aware Dynamic Voltage and Frequency Scaling. ISVLSI 2010: 304-309
2000 – 2009
- 2009
- [c22]Alireza Aminlou, Fatemeh Refan, Mahmoud Reza Hashemi, Omid Fatemi, Saeed Safari:
A cost-error optimized architecture for 9/7 lifting based Discrete Wavelet Transform with balanced pipeline stages. ICASSP 2009: 589-592 - [c21]Fouzhan Hosseini, Amir Fijany, Saeed Safari
Real-Time Parallel Implementation of SSD Stereo Vision Algorithm on CSX SIMD Architecture. ISVC (1) 2009: 808-818 - [c20]Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Saeed Safari
Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips. VLSI Design 2009: 151-156 - [c19]Amir-Mohammad Rahmani, I. Kamali, Pejman Lotfi-Kamran, Ali Afzali-Kusha, Saeed Safari
Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. VLSI Design 2009: 157-162 - 2008
- [j4]Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari
Designing an ultra-high-speed multiply-accumulate structure. Microelectron. J. 39(12): 1476-1484 (2008) - [c18]Amin Farmahini Farahani, Seid Mehdi Fakhraie, Saeed Safari
Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence. DATE 2008: 1340-1345 - [c17]Naghmeh Karimi, Soheil Aminzadeh, Saeed Safari
A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing. IOLTS 2008: 173-174 - [c16]Fatemeh Refan, Homa Alemzadeh
Reliability in Application Specific Mesh-Based NoC Architectures. IOLTS 2008: 207-212 - [c15]Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari
A 65nm 10GHz pipelined MAC structure. ISCAS 2008: 460-463 - [c14]Saeed Safari
Co-evolutionary reliability-oriented high-level synthesis. ISCAS 2008: 2026-2029 - [c13]Mojtaba Valinataj
Inherent reliability evaluation of Networks-on-Chip based on analytical models. SoC 2008: 1-4 - 2007
- [j3]Fatemeh Kashfi, Amir Agah, Sied Mehdi Fakhraie, Saeed Safari
15GHz low-voltage-swing carry-lookahead adder. IEICE Electron. Express 4(22): 696-700 (2007) - [j2]Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari
HW/SW architecture for soft-error cancellation in real-time operating system. IEICE Electron. Express 4(23): 755-761 (2007) - [c12]Mohammad Hossein Neishaburi, Masoud Daneshtalab, Mohammad Reza Kakoee, Saeed Safari
Improving Robustness of Real-Time Operating Systems (RTOS) Services Related to Soft-Errors. AICCSA 2007: 528-534 - [c11]Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari
A HW/SW Architecture to Reduce the Effects of Soft-Errors in Real-Time Operating System Services. DDECS 2007: 247-250 - [c10]Mojtaba Valinataj
Fault Tolerant Arithmetic Operations with Multiple Error Detection and Correction. DFT 2007: 188-196 - [c9]Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari
On-Chip Verification of NoCs Using Assertion Processors. DSD 2007: 535-538 - [c8]Soheil Aminzadeh, Saeed Safari
Co-evolutionary high-level test synthesis. ACM Great Lakes Symposium on VLSI 2007: 67-72 - [c7]Amin Farmahini Farahani, Mehdi Kamal, Seid Mehdi Fakhraie, Saeed Safari
HW/SW partitioning using discrete particle swarm. ACM Great Lakes Symposium on VLSI 2007: 359-364 - [c6]Amin Farmahini Farahani, Sied Mehdi Fakhraie, Saeed Safari
SOPC-Based Architecture for Discrete Particle Swarm Optimization. ICECS 2007: 1003-1006 - [c5]Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari
Assertion based design error diagnosis for core-based SoCs. SoCC 2007: 269-272 - 2006
- [j1]Saeed Safari
A parameterized graph-based framework for high-level test synthesis. Integr. 39(4): 363-381 (2006) - [c4]Hadi Parandeh-Afshar, Mohsen Ahmadvand, Saeed Safari
A Novel Merged Multiplier-Accumulator Embedded in DSP Coprocessor. ICECS 2006: 119-122 - [c3]MohammadReza EffatParvar, Karim Faez, Mehdi EffatParvar
An Intelligent MLFQ Scheduling Algorithm (IMLFQ) with Fault Tolerant Mechanism. ISDA (3) 2006: 80-85 - 2003
- [c2]Saeed Safari
Testability Improvement During High-Level Synthesis. Asian Test Symposium 2003: 505 - [c1]Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir:
A novel improvement technique for high-level test synthesis. ISCAS (5) 2003: 609-612
Coauthor Index
Sied Mehdi Fakhraie
aka: Seid Mehdi Fakhraie
aka: Seid Mehdi Fakhraie
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-05 20:19 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: