SoC design targeted at the iCEbreaker board
The Robin SoC consists of several components, each documented on their own wiki page.
- The SoC/CPU itself (Hardware definition files in Verilog)
- A monitor program, to interact with the hardware
- An assembler, to compile assembly to binary files
- A compiler, to convert a C-like language to assembly
- A simulator, to simulate running binary programs
Additionally, the CPU design is being documented on a separate website and progess is reported on a blog
The badges indicate whether the main python files pass pep8, all instructions can be simulated correctly in the simulator, libc examples can be compiled, assembled and simulated with correct results and lastly whether the verilog testbenches work. Nothing of this does imply that de hardware works, there are separate testcases for that but I cannot run them on GitHub.
- python3
- yosys
- nextpnr-ice40
- icestorm
git clone https://github.com/varkenvarken/robin.git
cd robin
git submodule update --init
cd SoC
make
You can then flash the iCEbreaker (if connected to a USB port) with
make flash
It might be a good thing to run the hardware test at that point
cd Test
make
make testhard