[go: up one dir, main page]

Skip to content

Tags: oxidecomputer/hubris

Tags

sidecar-v1.0.31

Toggle sidecar-v1.0.31's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Initial espi fpga (#1915)

This includes grapefruit FPGA functionality allowing ruby (with some
rework) to boot via eSPI from flash on the grapefruit.

gimlet-v1.0.32

Toggle gimlet-v1.0.32's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Initial espi fpga (#1915)

This includes grapefruit FPGA functionality allowing ruby (with some
rework) to boot via eSPI from flash on the grapefruit.

oxide-rot-1-v1.0.30

Toggle oxide-rot-1-v1.0.30's commit message
Add buildomat jobs for select images

It's useful to have some images that have gone through a
`permslip sign`. Do so in a very limited fashion.

sidecar-v1.0.30

Toggle sidecar-v1.0.30's commit message
Clear SP flash errors we should never see

The STM32H7 is haunted/contains an errata where the CPU may
speculate into a system area (`0x1ff0_0000`) and trigger a flash
error normally only seen when security features are enabled.
This is not an official errata but seems to be well(?) reported

https://community.st.com/t5/stm32-mcus-products/spurious-rdperr-and-rdserr-when-all-protection-and-security/td-p/279852
zephyrproject-rtos/zephyr#60449

One suggested workaround is to add an extra MPU region which
marks The Danger Zone as NX. For the way hubris is designed this
isn't plausible. Instead clear any errors before we attempt to
write to flash.

psc-v1.0.30

Toggle psc-v1.0.30's commit message
Clear SP flash errors we should never see

The STM32H7 is haunted/contains an errata where the CPU may
speculate into a system area (`0x1ff0_0000`) and trigger a flash
error normally only seen when security features are enabled.
This is not an official errata but seems to be well(?) reported

https://community.st.com/t5/stm32-mcus-products/spurious-rdperr-and-rdserr-when-all-protection-and-security/td-p/279852
zephyrproject-rtos/zephyr#60449

One suggested workaround is to add an extra MPU region which
marks The Danger Zone as NX. For the way hubris is designed this
isn't plausible. Instead clear any errors before we attempt to
write to flash.

gimlet-v1.0.31

Toggle gimlet-v1.0.31's commit message
Clear SP flash errors we should never see

The STM32H7 is haunted/contains an errata where the CPU may
speculate into a system area (`0x1ff0_0000`) and trigger a flash
error normally only seen when security features are enabled.
This is not an official errata but seems to be well(?) reported

https://community.st.com/t5/stm32-mcus-products/spurious-rdperr-and-rdserr-when-all-protection-and-security/td-p/279852
zephyrproject-rtos/zephyr#60449

One suggested workaround is to add an extra MPU region which
marks The Danger Zone as NX. For the way hubris is designed this
isn't plausible. Instead clear any errors before we attempt to
write to flash.

sidecar-v1.0.29

Toggle sidecar-v1.0.29's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Fail to build if tasks may overflow (#1890)

psc-v1.0.29

Toggle psc-v1.0.29's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Fail to build if tasks may overflow (#1890)

oxide-rot-1-v1.0.29

Toggle oxide-rot-1-v1.0.29's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Fail to build if tasks may overflow (#1890)

mfg-sidecar-v1.0.29

Toggle mfg-sidecar-v1.0.29's commit message

Verified

This commit was created on GitHub.com and signed with GitHub’s verified signature.
Fail to build if tasks may overflow (#1890)