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v3.8

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hwt v3.8

* support assignment to signal negations (~a=b interpreted as a=~b)
* struct val _eq, ==, !=
* fix various erros with verilog tmp. variables
* simplify the API of simulation testscases (Now only SimTestCase)
* HdlType_to_Interface, Interface_to_HdlType
* hwt.math
* cast functions also for StructIntf
* various improvements in internal structures of HdlStatement to
simplify and improve code coverage
* shortened backtrace for common user caused errors to highlight where
in user code the error happend

v3.7

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hwt v3.7

* additional utils and other minor improvements

v3.6

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hwt v3.6

* better representation of clock dependency in statements
* combinational loop analyser
* ComponentPath and TypePath as only representations of such a path

v3.5

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hwt v3.5

* minor user experience improvements
   * HObjList not modifiable after registration on Unit/Interface object

v3.4

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hwt v3.4

* update deps

v3.3

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hwt v3.3

* better support for memories with byte-enable
* improved simulator API
	* performance
	* configurability, now it is possible to swap default simulator
	  and output format by properties on SimTestCase

v3.2

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hwt v3.2

* pip package cleanup

v3.1

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hwt v3.1

* extraction of serializers and HDL AST to hdlConvertorAst
* constrain synthesis
* rework of serializer API
  * better support for post translations modifications
  * improved code sharability between serializers
  * improved performance
  * early detection of HDL code sharability
  * support for externaly defined HDL types
* unified behavior of HdlType classes

v3.0

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hwt v3.0

* Python3.5 compatibility

v2.9

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hwt v2.9

* Python3.5 compatibility