Futurebus

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Futurebus (IEEE 896) is a computer bus standard designed to replace all local bus connections in a computer, including the CPU, plug-in cards, and even some LAN links between machines. The project started in 1979 and was completed in 1987, but then went through a redesign until 1994. It has seen little real-world use, although custom implementations are still designed.

In the late 1970s, VMEbus was faster than the parts plugged into it. It can connect a CPU and RAM to VME on separate cards to build a computer. However, as the speed of the CPUs and RAM rapidly increased, Futurebus created a successor to VMEbus using asynchronous links. Though the ability to have several cards in the system as "masters", allowing Futurebus to build multiprocessor machines, required some form of "distributed arbitration" to allow the various cards to gain access to the bus at any point, as opposed to VME, which put a single master in slot 0 with overall control.

Typical IEEE standards start with a company building a device, then submitting it to the IEEE for the standardization effort. In the case of Futurebus, the whole system was being designed during the standardization effort. It took eight years before the specification was finally agreed on in 1987. Tektronix did make a few workstations based on Futurebus.^[1] It took another four years for the Futurebus+ Standard to be released. The IEEE 896 committee later split from the IEEE Microcomputer Standards Committee and formed the IEEE Bus Architecture Standards Committee (BASC).

Futurebus+ transceivers that meet the IEEE Standard 1194.1-1991 Backplane Transceiver Logic (BTL) standard are still made by Texas Instruments. Futurebus+ was used as the I/O bus in the DEC 4000 AXP and DEC 10000 AXP systems. Futurebus+ FDDI boards are still supported in the OpenVMS operating system.

Futurebus is described in the following IEEE standards:

• 896.1-1987: IEEE Standard Backplane Bus Specifications for Multiprocessor Architectures: Futurebus
• 1101-1987: IEEE Standard for Mechanical Core Specifications for Microcomputers Using IEC 603-2 Connectors
• 896.2 IEEE contains three Profiles for target markets—A for general-purpose systems, B for an I/O bus, and F for a Futurebus+. Profile A was sponsored by the VMEbus community. Profile B was sponsored by Digital Equipment Corporation and implemented in VAX and Alpha systems as an I/O bus. Profile F was sponsored by John Theus while he worked at Tektronix and was intended for high-end workstations.

Futurebus systems were implemented with 9U×280 Eurocard mechanics using 96-pin DIN connectors, resulting in a backplane that supported both 16- and 32-bit bus widths. Futurebus+ boards are 12SU×12SU Hard Metric size defined in the IEEE 1301 standards.

• InfiniBand
• QuickRing
• Scalable Coherent Interconnect (SCI)
• Bus topology
• FASTBUS

• The Futurebus+ Handbook, John Theus, VITA
• Futurebus+ Handbook for Digital Systems, Digital Equipment Corporation

• Buses at the Wayback Machine (archived February 12, 2010)