2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS.">2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS., dblp, computer science, bibliography, knowledge graph, author, editor, publication, conference, journal, book, thesis, database, collection, open data, bibtex">

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"A 0.0285-mm2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR ..."

Xiaoteng Zhao et al. (2022)

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DOI: 10.1109/JSSC.2021.3113773

access: closed

type: Journal Article

metadata version: 2022-02-08

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Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285-mm² 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS. IEEE J. Solid State Circuits 57(2): 546-561 (2022)

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