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"A 0.6V 6.4fJ/conversion-step 10-bit 150MS/s subranging SAR ADC in 40nm CMOS."

Yao-Sheng Hu et al. (2014)

Details and statistics

DOI: 10.1109/ASSCC.2014.7008865

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-01