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S. Saqib Khursheed
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- affiliation: University of Liverpool, UK
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2020 – today
- 2023
- [j27]Gor Piliposyan
, Saqib Khursheed:
PCB Hardware Trojan Run-Time Detection Through Machine Learning. IEEE Trans. Computers 72(7): 1958-1970 (2023) - 2022
- [j26]Gor Piliposyan
Hardware Trojan Detection on a PCB Through Differential Power Monitoring. IEEE Trans. Emerg. Top. Comput. 10(2): 740-751 (2022) - [j25]Antonio Leonel Hernández Martínez, Saqib Khursheed, Turki Alnuayri
Online Remaining Useful Lifetime Prediction Using Support Vector Regression. IEEE Trans. Emerg. Top. Comput. 10(3): 1546-1557 (2022) - [c26]Anmol Singh Narwariya
Operational Age Estimation of ICs using Gaussian Process Regression. DFT 2022: 1-5 - 2021
- [j24]Turki Alnuayri
Differential Aging Sensor Using Subthreshold Leakage Current to Detect Recycled ICs. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2064-2075 (2021) - [c25]Turki Alnuayri
Differential Aging Sensor to Detect Recycled ICs using Sub-threshold Leakage Current. DATE 2021: 1500-1503 - [c24]Anuraag Narang, Balaji Venn, S. Saqib Khursheed, Peter Harrod:
An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults. DFT 2021: 1-6 - [c23]Srisubha Kalanadhabhatta, Rashi Dutt
IC Age Estimation Methodology Using IO Pad Protection Diodes for Prevention of Recycled ICs. ISCAS 2021: 1-5 - 2020
- [j23]Leonel Hernández Martínez, S. Saqib Khursheed, Sudhakar M. Reddy:
LFSR generation for high test coverage and low hardware overhead. IET Comput. Digit. Tech. 14(1): 27-36 (2020) - [j22]Raviteja P. Reddy, Amit Acharyya
A Cost-Aware Framework for Lifetime Reliability of TSV-Based 3D-IC Design. IEEE Trans. Circuits Syst. 67-II(11): 2677-2681 (2020) - [c22]Srisubha Kalanadhabhatta, Kiran Kumar Anumandla, S. Saqib Khursheed, Amit Acharyya:
Secure Scan Design with a Novel Methodology of Scan Camouflaging. ECCTD 2020: 1-4 - [c21]Antonio Leonel Hernández Martínez, S. Saqib Khursheed, Daniele Rossi
Leveraging CMOS Aging for Efficient Microelectronics Design. IOLTS 2020: 1-4
2010 – 2019
- 2019
- [j21]Antonio Miele, Martin A. Trefzer, S. Saqib Khursheed:
Guest Editorial: Defect and Fault Tolerance in VLSI and Nanotechnology Systems. IET Comput. Digit. Tech. 13(3): 127-128 (2019) - [c20]Raviteja P. Reddy, Amit Acharyya, S. Saqib Khursheed:
A Framework for TSV Based 3D-IC to Analyze Aging and TSV Thermo-Mechanical Stress on Soft Errors. ITC-Asia 2019: 121-126 - [p1]Raviteja P. Reddy, Amit Acharyya, S. Saqib Khursheed:
Fault Tolerance in 3D-ICs. Security and Fault Tolerance in Internet of Things 2019: 155-178 - 2018
- [j20]Vasileios Tenentes
Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 883-895 (2018) - [c19]Daniele Rossi
Recycled IC detection through aging sensor. ETS 2018: 1-2 - 2017
- [j19]Srinivas Sabbavarapu
Improved Wire Length-Driven Placement Technique for Minimizing Wire Length, Area and Timing. J. Low Power Electron. 13(3): 456-471 (2017) - [j18]Daniele Rossi
Aging Benefits in Nanometer CMOS Designs. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 324-328 (2017) - [j17]Vasileios Tenentes
Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1397-1407 (2017) - [j16]Raviteja P. Reddy, Amit Acharyya
A Cost-Effective Fault Tolerance Technique for Functional TSV in 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2071-2080 (2017) - [c18]Rishad A. Shafik, Qiaoyan Yu, S. Saqib Khursheed, Antonio Miele
Welcome Message. DFT 2017 - 2016
- [j15]S. Saqib Khursheed, Pascal Vivet
Guest Editors' Introduction: Robust 3-D Stacked ICs. IEEE Des. Test 33(3): 6-7 (2016) - [j14]Daniele Rossi
Reliable Power Gating With NBTI Aging Benefits. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2735-2744 (2016) - [c17]Venkateshwarlu Y. Gudur, Sandeep Thallada, Abhinay R. Deevi, Venkata Krishna Gande, Amit Acharyya, Vasundhra Bhandari
Reconfigurable hardware-software codesign methodology for protein identification. EMBC 2016: 2456-2459 - [c16]Yi Zhao, S. Saqib Khursheed, Bashir M. Al-Hashimi, Zhiwen Zhao:
Co-optimization of fault tolerance, wirelength and temperature mitigation in TSV-based 3D ICs. VLSI-SoC 2016: 1-6 - 2015
- [j13]Vasileios Tenentes
DFT Architecture With Power-Distribution-Network Consideration for Delay-Based Power Gating Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 2013-2024 (2015) - [j12]Yi Zhao, S. Saqib Khursheed, Bashir M. Al-Hashimi:
Online Fault Tolerance Technique for TSV-Based 3-D-IC. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1567-1571 (2015) - [c15]Daniele Rossi
NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating. ETS 2015: 1-6 - [c14]Vasileios Tenentes
Diagnosis of power switches with power-distribution-network consideration. ETS 2015: 1-6 - [c13]Daniele Rossi
BTI and leakage aware dynamic voltage scaling for reliable low power cache memories. IOLTS 2015: 194-199 - [c12]Sheng Yang, Rishad A. Shafik, S. Saqib Khursheed, David Flynn, Geoff V. Merrett, Bashir M. Al-Hashimi:
Application-specific memory protection policies for energy-efficient reliable design. RSP 2015: 18-24 - 2014
- [j11]Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi, Wei Zhao:
Efficient Variation-Aware Delay Fault Simulation Methodology for Resistive Open and Bridge Defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(5): 798-810 (2014) - [j10]S. Saqib Khursheed, Kan Shi, Bashir M. Al-Hashimi, Peter R. Wilson, Krishnendu Chakrabarty
Delay Test for Diagnosis of Power Switches. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 197-206 (2014) - [c11]Vasileios Tenentes
High Quality Testing of Grid Style Power Gating. ATS 2014: 186-191 - 2013
- [j9]Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi, David Flynn, Geoff V. Merrett
Improved State Integrity of Flip-Flops for Voltage Scaled Retention Under PVT Variation. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2953-2961 (2013) - [c10]Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi:
Impact of PVT variation on delay test of resistive open and resistive bridge defects. DFTS 2013: 230-235 - 2011
- [j8]Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi:
A Fast and Accurate Process Variation-Aware Modeling Technique for Resistive Bridge Defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1719-1730 (2011) - [j7]Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi, David Flynn, Sachin Idgunji:
Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1773-1785 (2011) - [c9]Yi Zhao, S. Saqib Khursheed, Bashir M. Al-Hashimi:
Cost-Effective TSV Grouping for Yield Improvement of 3D-ICs. Asian Test Symposium 2011: 201-206 - [c8]Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Krishnendu Chakrabarty
Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation. Asian Test Symposium 2011: 389-394 - [c7]S. Saqib Khursheed, Sheng Yang, Bashir M. Al-Hashimi, Xiaoyu Huang, David Flynn:
Improved DFT for Testing Power Switches. ETS 2011: 7-12 - 2010
- [b1]Syed Saqib Khursheed:
Test and diagnosis of resistive bridges in multi-Vdd designs. University of Southampton, UK, 2010 - [j6]S. Saqib Khursheed, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
Gate-Sizing-Based Single Vdd Test for Bridge Defects in Multivoltage Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(9): 1409-1421 (2010) - [c6]Sheng Yang, Bashir M. Al-Hashimi, David Flynn, S. Saqib Khursheed:
Scan based methodology for reliable state retention power gating designs. DATE 2010: 69-74 - [c5]S. Saqib Khursheed, Shida Zhong, Robert C. Aitken, Bashir M. Al-Hashimi, Sandip Kundu:
Modeling the impact of process variation on resistive bridge defects. ITC 2010: 295-304
2000 – 2009
- 2009
- [j5]S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Peter Harrod:
Diagnosis of Multiple-Voltage Design With Bridge Defect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(3): 406-416 (2009) - [j4]Urban Ingelsson, Bashir M. Al-Hashimi, S. Saqib Khursheed, Sudhakar M. Reddy, Peter Harrod:
Process Variation-Aware Test for Resistive Bridges. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1269-1274 (2009) - [c4]S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Harrod:
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing. DATE 2009: 1349-1354 - 2008
- [j3]S. Saqib Khursheed, Urban Ingelsson, Paul M. Rosinger, Bashir M. Al-Hashimi, Peter Harrod:
Bridging Fault Test Method With Adaptive Power Management Awareness. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 1117-1127 (2008) - [c3]S. Saqib Khursheed, Paul M. Rosinger, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Peter Harrod:
Bridge Defect Diagnosis for Multiple-Voltage Design. ETS 2008: 99-104 - 2007
- [j2]Aiman El-Maleh
Efficient test compaction for combinational circuits based on Fault detection count-directed clustering. IET Comput. Digit. Tech. 1(4): 364-368 (2007) - [c2]Urban Ingelsson, Paul M. Rosinger, S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Harrod:
Resistive Bridging Faults DFT with Adaptive Power Management Awareness. ATS 2007: 101-106 - 2006
- [j1]Aiman H. El-Maleh
Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse-Order Restoration and Test Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2556-2564 (2006) - 2005
- [c1]Aiman H. El-Maleh
Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation. Asian Test Symposium 2005: 378-385
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