default search action
Yannis P. Tsividis
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j48]Paul Xuanyuanliang Huang
, Yannis P. Tsividis, Mingoo Seok
INTIACC: A Programmable Floating- Point Accelerator for Partial Differential Equations. IEEE J. Solid State Circuits 59(9): 3058-3069 (2024) - [c49]Paul Xuanyuanliang Huang
SPADES: A 0.54-GFLOPS/W Sparse Matrix Vector Multiplication Accelerator Featuring On-the-Fly GZIP Decompression for 3.36X Reduction in Off-Chip Data Movement. ISLPED 2024: 1-6 - 2022
- [c48]Paul Xuanyuanliang Huang, Daniel Jang, Yannis P. Tsividis, Mingoo Seok:
INTIACC: A 32-bit Floating-Point Programmable Custom-ISA Accelerator for Solving Classes of Partial Differential Equations. ESSCIRC 2022: 349-352
2010 – 2019
- 2019
- [j47]Sharvil Patil
Signal Encoding and Processing in Continuous Time Using a Cascade of Digital Delays. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 1017-1030 (2019) - 2018
- [j46]Yu Chen
A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption. IEEE J. Solid State Circuits 53(2): 418-430 (2018) - [j45]Ning Guo, Yipeng Huang
Corrections to "Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time". IEEE J. Solid State Circuits 53(6): 1870 (2018) - [c47]Yipeng Huang, Ning Guo, Simha Sethumadhavan, Mingoo Seok, Yannis P. Tsividis:
A Case Study in Analog Co-Processing for Solving Stochastic Differential Equations. DSP 2018: 1-5 - 2017
- [j44]Yipeng Huang
Analog Computing in a Modern Context: A Linear Algebra Accelerator Case Study. IEEE Micro 37(3): 30-38 (2017) - [c46]Yu Chen, Yannis P. Tsividis:
Signal processing in continuous time using asynchronous techniques. ACSSC 2017: 1605-1609 - [c45]Yu Chen, Rajit Manohar, Yannis P. Tsividis:
Design of tunable digital delay cells. CICC 2017: 1-4 - [c44]Yipeng Huang
Hybrid analog-digital solution of nonlinear partial differential equations. MICRO 2017: 665-678 - 2016
- [j43]Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis:
A 3-10 fJ/conv-step Error-Shaping Alias-Free Continuous-Time ADC. IEEE J. Solid State Circuits 51(4): 908-918 (2016) - [j42]Ning Guo, Yipeng Huang
Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time. IEEE J. Solid State Circuits 51(7): 1514-1524 (2016) - [c43]Yipeng Huang
Evaluation of an Analog Accelerator for Linear Algebra. ISCA 2016: 570-582 - [c42]Sharvil Patil, Yannis P. Tsividis:
Digital processing of signals produced by voltage-controlled-oscillator-based continuous-time ADCs. ISCAS 2016: 1046-1049 - [c41]Yu Chen, Yannis P. Tsividis:
Design considerations for variable-rate digital signal processing. ISCAS 2016: 2479-2482 - 2015
- [j41]Pablo Martínez-Nuevo
Derivative Level-Crossing Sampling. IEEE Trans. Circuits Syst. II Express Briefs 62-II(1): 11-15 (2015) - [j40]Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick:
Improving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2009-2022 (2015) - [c40]Ning Guo, Yipeng Huang
Continuous-time hybrid computation with programmable nonlinearities. ESSCIRC 2015: 279-282 - [c39]Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis:
A 3-10fJ/conv-step 0.0032mm2 error-shaping alias-free asynchronous ADC. VLSIC 2015: 160- - 2014
- [j39]Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis:
A Flexible, Event-Driven Digital Filter With Frequency Response Independent of Input Sample Rate. IEEE J. Solid State Circuits 49(10): 2292-2304 (2014) - 2013
- [j38]Colin Weltin-Wu, Yannis P. Tsividis:
An Event-driven Clockless Level-Crossing ADC With Signal-Dependent Adaptive Resolution. IEEE J. Solid State Circuits 48(9): 2180-2190 (2013) - [c38]Christos Vezyrtzis, Weiwei Jiang, Steven M. Nowick, Yannis P. Tsividis:
A flexible, clockless digital filter. ESSCIRC 2013: 65-68 - 2012
- [j37]Simha Sethumadhavan, Ryan Roberts, Yannis P. Tsividis:
A Case for Hybrid Discrete-Continuous Architectures. IEEE Comput. Archit. Lett. 11(1): 1-4 (2012) - [j36]Mariya Kurchuk, Colin Weltin-Wu, Dominique Morche, Yannis P. Tsividis:
Event-Driven GHz-Range Continuous-Time Digital Signal Processor With Activity-Dependent Power Dissipation. IEEE J. Solid State Circuits 47(9): 2164-2173 (2012) - [j35]Tao Mai, Yannis P. Tsividis:
Internally Non-LTI Systems Based on Delays, With Application to Companding Signal Processors. IEEE Trans. Circuits Syst. II Express Briefs 59-II(8): 476-480 (2012) - [c37]Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick:
Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications. ICCD 2012: 329-336 - [c36]Colin Weltin-Wu, Yannis P. Tsividis:
An event-driven, alias-free ADC with signal-dependent resolution. VLSIC 2012: 28-29 - 2011
- [j34]Aaron E. Klein, Yannis P. Tsividis:
Externally Linear Discrete-Time Systems With Application to Instantaneously Companding Digital Signal Processors. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(11): 2718-2728 (2011) - [c35]Christos Vezyrtzis, Aaron E. Klein, Dan Ellis, Yannis P. Tsividis:
Direct processing of mpeg audio using companding and BFP techniques. ICASSP 2011: 361-364 - [c34]Mariya Kurchuk, Colin Weltin-Wu, Dominique Morche, Yannis P. Tsividis:
GHz-range continuous-time programmable digital FIR with power dissipation that automatically adapts to signal activity. ISSCC 2011: 232-234 - 2010
- [j33]Mariya Kurchuk, Yannis P. Tsividis:
Signal-Dependent Variable-Resolution Clockless A/D Conversion With Application to Continuous-Time Digital Signal Processing. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 982-991 (2010) - [j32]Yannis P. Tsividis:
Event-Driven Data Acquisition and Digital Signal Processing - A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 57-II(8): 577-581 (2010) - [j31]Aaron E. Klein, Yannis P. Tsividis:
Externally linear time invariant digital signal processors. IEEE Trans. Signal Process. 58(9): 4897-4909 (2010) - [c33]Yannis P. Tsividis:
Event-driven data acquisition and continuous-time digital signal processing. CICC 2010: 1-8 - [c32]Yannis P. Tsividis:
Event-driven, continuous-time ADCs and DSPs for adapting power dissipation to signal activity. ISCAS 2010: 3581-3584 - [c31]Mariya Kurchuk, Yannis P. Tsividis:
Energy-efficient asynchronous delay element with wide controllability. ISCAS 2010: 3837-3840
2000 – 2009
- 2009
- [j30]Bob Schell, Yannis P. Tsividis:
Analysis and simulation of continuous-time digital signal processors. Signal Process. 89(10): 2013-2026 (2009) - [c30]Mariya Kurchuk, Yannis P. Tsividis:
Signal-dependent Variable-resolution Quantization for Continuous-time Digital Signal Processing. ISCAS 2009: 1109-1112 - [c29]Christos Vezyrtzis, Yannis P. Tsividis:
Processing of Signals using Level-crossing Sampling. ISCAS 2009: 2293-2296 - 2008
- [j29]Nebojsa Stanic, Ajay Balankutty, Peter R. Kinget
A 2.4-GHz ISM-Band Sliding-IF Receiver With a 0.5-V Supply. IEEE J. Solid State Circuits 43(5): 1138-1145 (2008) - [j28]Bob Schell, Yannis P. Tsividis:
A Low Power Tunable Delay Element Suitable for Asynchronous Delays of Burst Information. IEEE J. Solid State Circuits 43(5): 1227-1234 (2008) - [j27]Bob Schell, Yannis P. Tsividis:
A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation. IEEE J. Solid State Circuits 43(11): 2472-2481 (2008) - [c28]Bob Schell, Yannis P. Tsividis:
A Clockless ADC/DSP/DAC System with Activity-Dependent Power Dissipation and No Aliasing. ISSCC 2008: 550-551 - 2007
- [j26]Atsushi Yoshizawa, Yannis P. Tsividis:
A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation. IEEE J. Solid State Circuits 42(5): 1090-1099 (2007) - [j25]Atsushi Yoshizawa, Yannis P. Tsividis:
Correction to "A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation". IEEE J. Solid State Circuits 42(10): 2316 (2007) - [c27]Aaron E. Klein, Yannis P. Tsividis:
Instantaneously Companding Digital Signal Processors. ICASSP (3) 2007: 1433-1436 - [c26]Bob Schell, Yannis P. Tsividis:
Analysis of Continuous-Time Digital Signal Processors. ISCAS 2007: 2232-2235 - 2006
- [j24]Shouri Chatterjee
Ultra-Low Voltage Analog Integrated Circuits. IEICE Trans. Electron. 89-C(6): 673-680 (2006) - [j23]Glenn E. R. Cowan, Robert C. Melville, Yannis P. Tsividis:
A VLSI analog computer/digital computer accelerator. IEEE J. Solid State Circuits 41(1): 42-53 (2006) - [j22]Mehmet Tamer Ozgun, Yannis P. Tsividis, Gangadhar Burra:
Dynamic power optimization of active filters with application to zero-IF receivers. IEEE J. Solid State Circuits 41(6): 1344-1352 (2006) - [j21]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
A Continuous-Time Programmable Digital FIR Filter. IEEE J. Solid State Circuits 41(11): 2512-2520 (2006) - [j20]Shaorui Li, Nebojsa Stanic, Yannis P. Tsividis:
A VCF Loss-Control Tuning Loop for Q -Enhanced LC Filters. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 906-910 (2006) - [j19]Yannis P. Tsividis:
Mixed-Domain Systems and Signal Processing Based on Input Decomposition. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(10): 2145-2156 (2006) - [c25]Aaron E. Klein, Yannis P. Tsividis:
Companding Digital Signal Processors. ICASSP (3) 2006: 700-703 - [c24]Atsushi Yoshizawa, Yannis P. Tsividis:
A Blocker-Vigilant Channel-Select Filter with Adaptive IIP3 and Power Dissipation. ISSCC 2006: 1850-1859 - 2005
- [j18]Shouri Chatterjee
0.5-V analog circuit techniques and their application in OTA and filter design. IEEE J. Solid State Circuits 40(12): 2373-2387 (2005) - [c23]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
Continuous-Time Digital Signal Processors. ASYNC 2005: 138-143 - [c22]Yee William Li, Kenneth L. Shepard, Yannis P. Tsividis:
A continuous-time programmable digital FIR filter. CICC 2005: 695-698 - [c21]Yannis P. Tsividis, Glenn E. R. Cowan, Yee William Li, Kenneth L. Shepard:
Continuous-time DSPs, analog/digital computers and other mixed-domain circuits. ESSCIRC 2005: 113-116 - 2004
- [j17]Yorgos Palaskas, Yannis P. Tsividis, Vladimir I. Prodanov, Vito Boccuzzi:
A "divide and conquer" technique for implementing wide dynamic range continuous-time filters. IEEE J. Solid State Circuits 39(2): 297-307 (2004) - [c20]Shouri Chatterjee, Yannis P. Tsividis, Peter R. Kinget
A 0.5-V bulk-input fully differential operational transconductance amplifier. ESSCIRC 2004: 147-150 - [c19]Yannis P. Tsividis:
Digital signal processing in continuous time: a possibility for avoiding aliasing and reducing quantization error. ICASSP (2) 2004: 589-592 - [c18]Shaorui Li, Yannis P. Tsividis:
Analysis of oscillator amplitude control, and its application to automatic tuning of quality factor for active LC filters. ISCAS (4) 2004: 141-144 - [c17]Yannis P. Tsividis:
Mixing domains in signal processing. ISCAS (1) 2004: 157-160 - 2003
- [j16]Nagendra Krishnapura
Micropower low-voltage analog filter in a digital CMOS process. IEEE J. Solid State Circuits 38(6): 1063-1067 (2003) - [j15]Yorgos Palaskas, Yannis P. Tsividis:
Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 714-727 (2003) - [c16]Yorgos Palaskas, Yannis P. Tsividis, Vito Boccuzzi:
A power efficient channel selection filter/coarse AGC with no range switching transients. CICC 2003: 21-24 - [c15]Yorgos Palaskas, Yannis P. Tsividis:
Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters. ISCAS (1) 2003: 453-456 - 2002
- [j14]Atsushi Yoshizawa, Yannis P. Tsividis:
Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers. IEEE J. Solid State Circuits 37(3): 357-364 (2002) - [j13]Dandan Li, Yannis P. Tsividis:
Design techniques for automatically tuned integrated gigahertz-range active LC filters. IEEE J. Solid State Circuits 37(8): 967-977 (2002) - [c14]George Palaskas, Yannis P. Tsividis:
Design considerations and experimental evaluation of a syllabic companding audio frequency filter. ISCAS (3) 2002: 305-308 - 2001
- [j12]Yannis P. Tsividis:
Continuous-time filters in telecommunications chips. IEEE Commun. Mag. 39(4): 132-137 (2001) - [j11]Nagendra Krishnapura
Noise and power reduction in filters through the use of adjustable biasing. IEEE J. Solid State Circuits 36(12): 1912-1920 (2001) - [c13]Atsushi Yoshizawa, Yannis P. Tsividis:
An anti-blocker structure MOSFET-C filter for a direct conversion receiver. CICC 2001: 5-8 - [c12]George Palaskas, Yannis P. Tsividis:
A "divide and conquer" technique for the design of wide dynamic range continuous time filters. ISCAS (1) 2001: 252-255 - [c11]Laszlo Toth, Yannis P. Tsividis:
Generalized chopper stabilization. ISCAS (1) 2001: 540-543 - [c10]Laszlo Tóth, George Palaskas, Yannis P. Tsividis:
"Noninvasive" techniques for syllabic companding in signal processors. ISCAS (1) 2001: 683-686 - 2000
- [j10]Shanthi Pavan, Yannis P. Tsividis, Krishnaswamy Nagaraj:
Widely programmable high-frequency continuous-time filters in digital CMOS technology. IEEE J. Solid State Circuits 35(4): 503-511 (2000)
1990 – 1999
- 1999
- [c9]G. Efthivoulidis, Yannis P. Tsividis:
Signal analysis of externally linear filters. ISCAS (6) 1999: 65-68 - [c8]Shanthi Pavan, Yannis P. Tsividis, Krishnaswamy Nagaraj:
Modeling of accumulation MOS capacitors for analog design in digital VLSI processes. ISCAS (6) 1999: 202-205 - 1998
- [j9]Stamatis Bouras, Manousos Kotronakis, Ken Suyama, Yannis P. Tsividis:
Mixed analog-digital fuzzy logic controller with continuous-amplitude fuzzy inferences and defuzzification. IEEE Trans. Fuzzy Syst. 6(2): 205-215 (1998) - 1997
- [j8]Kostas Vavelidis, Yannis P. Tsividis, Frank Op't Eynde, Yannis Papananos:
Six-terminal MOSFET's: modeling and applications in highly linear, electronically tunable resistors. IEEE J. Solid State Circuits 32(1): 4-12 (1997) - 1996
- [j7]Spyros Pipilos, Yannis P. Tsividis, Josef Fenk, Yannis Papananos:
A Si 1.8 GHz RLC filter with tunable center frequency and quality factor. IEEE J. Solid State Circuits 31(10): 1517-1525 (1996) - [c7]Yannis Papananos, Theodore Georgantas, Yannis P. Tsividis:
Design considerations and implementation of very low frequency continuous-time CMOS monolithic filters. ICECS 1996: 223-226 - [c6]Yannis Papananos, Yannis P. Tsividis:
Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop. ICECS 1996: 904-907 - 1994
- [j6]Yannis P. Tsividis:
Integrated continuous-time filter design - an overview. IEEE J. Solid State Circuits 29(3): 166-176 (1994) - [j5]Yannis P. Tsividis, Ken Suyama:
MOSFET modeling for analog circuit CAD: problems and prospects. IEEE J. Solid State Circuits 29(3): 210-216 (1994) - [c5]Spyros Pipilos, Yannis P. Tsividis:
Design of Active RLC Integrated Filters with Application in the GHz Range. ISCAS 1994: 645-648 - 1993
- [c4]Kostas Vavelidis, Yannis P. Tsividis:
Design Considerations for Highly Linear Electronically Tunable Resistor. ISCAS 1993: 1180-1183 - [c3]Laszlo Tóth, V. Gopinathan, Yannis P. Tsividis, Nicholas G. Maratos:
Bounds on Noise in Integrated Active-RC and MOSFET-C Filters. ISCAS 1993: 1255-1258 - [c2]Theodore Georgantas, Yannis Papananos, Yannis P. Tsividis:
A Comparative Study of Five Integrator Structures for Monolithic Continuous-time Filters. ISCAS 1993: 1259-1262
1980 – 1989
- 1989
- [c1]Srinagesh Satyanarayana, Yannis P. Tsividis, Hans Peter Graf:
A Reconfigurable Analog VLSI Neural Network Chip. NIPS 1989: 758-768 - 1988
- [j4]Mihai Banu, John M. Khoury, Yannis P. Tsividis:
Fully differential operational amplifiers with accurate output balancing. IEEE J. Solid State Circuits 23(6): 1410-1414 (1988) - [j3]Srinagesh Satyanarayana, Ken Suyama, Yannis P. Tsividis:
Analog MOS circuit techniques in the VLSI implementation of neural networks. Neural Networks 1(Supplement-1): 406-412 (1988) - 1985
- [j2]San-Chin Fang, Yannis P. Tsividis, Omar Wing:
Time- and Frequency-Domain Analysis of Linear Switched-Capacitor Networks Using State Charge Variables. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 651-661 (1985) - 1984
- [j1]Yannis P. Tsividis, Guido Masetti:
Problems in Precision Modeling of the MOS Transistor for Analog Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(1): 72-79 (1984)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-06 21:36 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: