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Yorgos Palaskas
Person information
- affiliation: Intel Corporation, Hillsboro, OR, USA
- affiliation: Columbia University, New York, NY, USA
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2020 – today
- 2020
- [j15]Paolo Madoglio
, Yorgos Palaskas
A Cellular Multiband DTC-Based Digital Polar Transmitter With -153-dBc/Hz Noise in 14-nm FinFET. IEEE J. Solid State Circuits 55(7): 1830-1841 (2020) - [c29]Parmoon Seddighrad, Yorgos Palaskas, Hongtao Xu, Paolo Madoglio, Kailash Chandrashekar, David J. Allstot:
Transformer-Combining Digital PA with Efficiency Peaking at 0, -6, and -12 dB Backoff in 32nm CMOS. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [c28]Yorgos Palaskas, Peter Plechinger, Ashoke Ravi, Ofir Degani, Rotem Banin, Eshel Gordon, Zdravko Boos, Paolo Madoglio, Jörn Angel, Jakob M. Tomasik, Sven Hampel, Petra Schubert, Peter Preyler, Thomas Mayer, Thomas Bauernfeind:
A Cellular Multiband DTC-Based Digital Polar Transmitter With -153 dBc/Hz Noise in 14-nm FinFET. ESSCIRC 2019: 179-182 - 2017
- [c27]Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Luis Cuellar, Muhammad Faisal, Yee William Li, Hyung Seok Kim, Khoa Minh Nguyen, Yulin Tan, Brent R. Carlton, Vaibhav A. Vaidya, Yanjie Wang, Thomas Tetzlaff, Satoshi Suzuki, Amr Fahim, Parmoon Seddighrad, Jianyong Xie, Zhichao Zhang, Divya Shree Vemparala, Ashoke Ravi, Stefano Pellerano, Yorgos Palaskas:
13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications. ISSCC 2017: 226-227 - 2015
- [c26]Vamsi Talla, Stefano Pellerano, Hongtao Xu, Ashoke Ravi, Yorgos Palaskas:
Wi-Fi RF energy harvesting for battery-free wearable radio platforms. IEEE RFID 2015: 47-54 - 2013
- [c25]Albert C. Jerng, Yorgos Palaskas, Eric A. M. Klumperink, Didier Belot, Songcheol Hong, Brian A. Floyd:
F1: Advanced RF transceiver design techniques. ISSCC 2013: 500-501 - 2012
- [j14]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement. IEEE J. Solid State Circuits 47(7): 1646-1658 (2012) - [j13]Ashoke Ravi, Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst
A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. IEEE J. Solid State Circuits 47(12): 3184-3196 (2012) - [c24]Paolo Madoglio, Ashoke Ravi, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst
A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS. ISSCC 2012: 168-170 - [c23]Ehsan Afshari, Yorgos Palaskas:
Session 15 overview: Mm-Wave and THz techniques: RF subcommittee. ISSCC 2012: 250-251 - [c22]Kailash Chandrashekar, Stefano Pellerano, Paolo Madoglio, Ashoke Ravi, Yorgos Palaskas:
A 32nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management. ISSCC 2012: 352-354 - [c21]Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala:
A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. VLSIC 2012: 76-77 - 2011
- [j12]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Masoud Sajadieh, Mohammed A. El-Tanani
A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in 32 nm CMOS for WLAN Application. IEEE J. Solid State Circuits 46(7): 1596-1605 (2011) - [j11]Jafar Savoj, Yiannos Manoli, Hooman Darabi, Yorgos Palaskas, Michael Moyal:
Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 46(12): 2739-2744 (2011) - [c20]Ajay Balankutty, Stefano Pellerano, Telesphor Kamgaing, Kranti Tantwai, Yorgos Palaskas:
A 12-element 60GHz CMOS phased array transmitter on LTCC package with integrated antennas. A-SSCC 2011: 273-276 - [c19]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control. ESSCIRC 2011: 131-134 - 2010
- [j10]Paolo Madoglio, Ashoke Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas:
A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving. IEEE J. Solid State Circuits 45(7): 1410-1420 (2010) - [j9]Stefano Pellerano, Javier Alvarado Jr., Yorgos Palaskas:
A mm-Wave Power-Harvesting RFID Tag in 90 nm CMOS. IEEE J. Solid State Circuits 45(8): 1627-1637 (2010) - [c18]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Krishnamurthy Soumyanath:
A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application. ESSCIRC 2010: 306-309
2000 – 2009
- 2009
- [j8]Jeffrey S. Walling
A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits 44(6): 1668-1678 (2009) - [j7]Stefano Pellerano, Paolo Madoglio, Yorgos Palaskas:
A 4.75-GHz Fractional Frequency Divider-by-1.25 With TDC-Based All-Digital Spur Calibration in 45-nm CMOS. IEEE J. Solid State Circuits 44(12): 3422-3433 (2009) - [c17]Stefano Pellerano, Javier Alvarado Jr., Yorgos Palaskas:
A mm-wave power harvesting RFID tag in 90nm CMOS. CICC 2009: 677-680 - [c16]Paolo Madoglio, Ashoke Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas:
A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving. ESSCIRC 2009: 152-155 - [c15]Stefano Pellerano, Paolo Madoglio, Yorgos Palaskas:
A 4.75GHz fractional frequency divider with digital spur calibration in 45nm CMOS. ISSCC 2009: 226-227 - 2008
- [j6]Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath:
A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS. IEEE J. Solid State Circuits 43(7): 1542-1552 (2008) - [c14]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano:
MIMO techniques for high data rate radio communications. CICC 2008: 141-148 - [c13]Stefano Pellerano, Rajarshi Mukhopadhyay, Ashoke Ravi, Joy Laskar, Yorgos Palaskas:
A 39.1-to-41.6GHz ΔΣ Fractional-N Frequency Synthesizer in 90nm CMOS. ISSCC 2008: 484-485 - [c12]Jeffrey S. Walling
A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC 2008: 566-567 - 2007
- [j5]Sunghyun Park, Yorgos Palaskas, Michael P. Flynn:
A 4-GS/s 4-bit Flash ADC in 0.18-µm CMOS. IEEE J. Solid State Circuits 42(9): 1865-1872 (2007) - [c11]Stefano Pellerano, Yorgos Palaskas, Krishnamurthy Soumyanath:
A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS. ESSCIRC 2007: 352-355 - 2006
- [j4]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process. IEEE J. Solid State Circuits 41(8): 1757-1763 (2006) - [j3]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Nati Dinur, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5-GHz 108-Mb/s 2 $\times$2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm ${\rm P}_{\rm 1dB}$ Power Amplifiers in 90-nm CMOS. IEEE J. Solid State Circuits 41(12): 2746-2756 (2006) - [c10]Sunghyun Park, Yorgos Palaskas, Ashoke Ravi, Ralph E. Bishop, Michael P. Flynn:
A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS. CICC 2006: 489-492 - [c9]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS. ISSCC 2006: 1420-1429 - [c8]Sunghyun Park, Yorgos Palaskas, Michael P. Flynn:
A 4GS/s 4b Flash ADC in 0.18µm CMOS. ISSCC 2006: 2330-2339 - 2005
- [c7]Yorgos Palaskas, Ralph E. Bishop, Ashoke Ravi, Krishnamurthy Soumyanath:
A 90-nm MOS-only 3-11GHz transmitter for UWB. CICC 2005: 165-168 - [c6]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction. CICC 2005: 813-816 - 2004
- [j2]Yorgos Palaskas, Yannis P. Tsividis, Vladimir I. Prodanov, Vito Boccuzzi:
A "divide and conquer" technique for implementing wide dynamic range continuous-time filters. IEEE J. Solid State Circuits 39(2): 297-307 (2004) - 2003
- [j1]Yorgos Palaskas, Yannis P. Tsividis:
Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 714-727 (2003) - [c5]Yorgos Palaskas, Yannis P. Tsividis, Vito Boccuzzi:
A power efficient channel selection filter/coarse AGC with no range switching transients. CICC 2003: 21-24 - [c4]Yorgos Palaskas, Yannis P. Tsividis:
Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filters. ISCAS (1) 2003: 453-456 - 2002
- [c3]George Palaskas, Yannis P. Tsividis:
Design considerations and experimental evaluation of a syllabic companding audio frequency filter. ISCAS (3) 2002: 305-308 - 2001
- [c2]George Palaskas, Yannis P. Tsividis:
A "divide and conquer" technique for the design of wide dynamic range continuous time filters. ISCAS (1) 2001: 252-255 - [c1]Laszlo Tóth, George Palaskas, Yannis P. Tsividis:
"Noninvasive" techniques for syllabic companding in signal processors. ISCAS (1) 2001: 683-686
Coauthor Index
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