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Fumihiro Minami
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2010 – 2019
- 2013
- [j4]Susumu Kobayashi, Fumihiro Minami:
A Method for Minimizing Clock Skew Fluctuations Caused by Interconnect Process Variations. IEICE Trans. Inf. Syst. 96-D(9): 1980-1985 (2013) - 2010
- [j3]Takaaki Okumura, Fumihiro Minami, Kenji Shimazaki, Kimihiko Kuwada, Masanori Hashimoto
:
Gate Delay Estimation in STA under Dynamic Power Supply Noise. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2447-2455 (2010) - [c8]Takaaki Okumura, Fumihiro Minami, Kenji Shimazaki, Kimihiko Kuwada, Masanori Hashimoto
Gate delay estimation in STA under dynamic power supply noise. ASP-DAC 2010: 775-780
2000 – 2009
- 2007
- [i1]Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa:
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. CoRR abs/0710.4762 (2007) - 2006
- [j2]Toshihide Fujiyoshi, Shinichiro Shiratake, Shuou Nomura, Tsuyoshi Nishikawa, Yoshiyuki Kitasho, Hideho Arakida, Yuji Okuda, Yoshiro Tsuboi, Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Fumitoshi Hatori, Takayoshi Shimazawa, Kunihiko Yahagi, Hideki Takeda, Masami Murakata, Fumihiro Minami, Naoyuki Kawabe, Takeshi Kitahara, Katsuhiro Seta, Masafumi Takahashi, Yukihito Oowaki, Tohru Furuyama:
A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling. IEEE J. Solid State Circuits 41(1): 54-62 (2006) - [c7]Takeshi Kitahara, Hiroyuki Hara, Shinichiro Shiratake, Yoshiki Tsukiboshi, Tomoyuki Yoda, Tetsuaki Utsumi, Fumihiro Minami:
Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems. ASP-DAC 2006: 533-540 - 2005
- [c6]Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa:
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction. DATE 2005: 646-647 - 2004
- [c5]Sachio Hayashi, Fumihiro Minami, Masaaki Yamada:
Full-Chip Analysis Method of ESD Protection Network. ISQED 2004: 439-444
1990 – 1999
- 1998
- [j1]Kimiyoshi Usami, Mutsunori Igarashi, Fumihiro Minami, Takashi Ishikawa, Masahiro Kanazawa, Makoto Ichida, Kazutaka Nogami:
Automated low-power technique exploiting multiple supply voltages applied to a media processor. IEEE J. Solid State Circuits 33(3): 463-472 (1998) - [c4]Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi:
A Clock-Gating Method for Low-Power LSI Design. ASP-DAC 1998: 307-312 - 1997
- [c3]Mutsunori Igarashi, Kimiyoshi Usami, Kazutaka Nogami, Fumihiro Minami, Yukio Kawasaki, Takahiro Aoki, Midori Takano, Chiharo Mizuno, Takashi Ishikawa, Masahiro Kanazawa, Shinji Sonoda, Makoto Ichida, Naoyuki Hatanaka:
A low-power design method using multiple supply voltages. ISLPED 1997: 36-41 - 1996
- [c2]Taku Uchino, Fumihiro Minami, Masami Murakata, Takashi Mitsuhashi:
Switching activity analysis for sequential circuits using Boolean approximation method. ISLPED 1996: 79-84 - 1995
- [c1]Taku Uchino, Fumihiro Minami, Takashi Mitsuhashi, Nobuyuki Goto:
Switching activity analysis using Boolean approximation method. ICCAD 1995: 20-25
Coauthor Index
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