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Tetsu Tanaka
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2020 – today
- 2023
- [c54]Jiayi Shen, Chang Liu, Tadaaki Hoshi, Atsushi Sinoda, Hisashi Kino, Tetsu Tanaka, Mariappan Murugesan, Mitsumasa Koyanagi, Takafumi Fukushima
:
Impact of Super-long-throw PVD on TSV Metallization and Die-to-Wafer 3D Integration Based on Via-last. 3DIC 2023: 1-4 - [c53]Kohei Nakamura, Bang Du, Keishun Sugishita, Ryo Hasegawa, Hisashi Kino, Takafumi Fukushima
Development of Trans-nail PPG Controller Using Fingertip Blood Volume Changes to Enable Highly Accurate Motion Prediction. BioCAS 2023: 1-4 - 2022
- [j4]Yaogan Liang, Bang Du, Kohei Nakamura, Shengwei Wang, Bunta Inoue, Yuta Aruga, Hisashi Kino, Takafumi Fukushima
3D-stacked retinal prosthesis chip with binary image capture and edge detection functions for human visual restoration. IEICE Electron. Express 19(23): 20220363 (2022) - [c52]Kohei Nakamura, Yaogan Liang, Bang Du, Shengwei Wang, Yuta Aruga, Bunta Inoue, Hisashi Kino, Takafumi Fukushima
Implementation of Light and Dark Adaptation Function for High QOL 3D-Stacked Artificial Retina Chip. BioCAS 2022: 519-523 - 2021
- [c51]Takafumi Fukushima
Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing. 3DIC 2021: 1-4 - [c50]Yaogan Liana, Zhengyang Qian, Bang Du, Jinming Ye, Kohei Nakamura, Shengwei Wang, Hisashi Kino, Takafumi Fukushima
Design and Evaluation of Electronic-Microsaccade with Balanced Stimulation for Artificial Vision System. BioCAS 2021: 1-4
2010 – 2019
- 2019
- [c49]Hisashi Kino
Investigation of the Underfill with Negative-Thermal-Expansion Material to Suppress Mechanical Stress in 3D Integration System. 3DIC 2019: 1-4 - [c48]Koji Kiyoyama, Qian Zhengy, Hiroyuki Hashimoto, Hisashi Kino
Development of a CDS Circuit for 3-D Stacked Neural Network Chip using CMOS Analog Signal Processing. 3DIC 2019: 1-4 - [c47]Sungho Lee, Yuki Susumago, Zhengyang Qian, Noriyuki Takahashi, Hisashi Kino
Development of 3D-IC Embedded Flexible Hybrid System. 3DIC 2019: 1-4 - [c46]Rui Liang, Sungho Lee, Yuki Miwa, Kousei Kumahara, Mariappan Murugesan, Hisashi Kino
Impacts of Deposition Temperature and Annealing Condition on Ozone-Ethylene Radical Generation-TEOS-CVD SiO2 for Low-Temperature TSV Liner Formation. 3DIC 2019: 1-4 - [c45]Yuki Miwa, Sungho Lee, Rui Liang, Kousei Kumahara, Hisashi Kino
Characterization of Low-Height Solder Microbump Bonding for Fine-Pitch Inter-Chip Connection in 3DICs. 3DIC 2019: 1-4 - [c44]Ryosuke Yabuki, Tetsu Tanaka
PPG and SpO2 Recording Circuit with Ambient Light Cancellation for Trans-Nail Pulse-Wave Monitoring System. BioCAS 2019: 1-4 - 2018
- [c43]Kar Mun Lee, Zhengyang Qian, Ryosuke Yabuki, Bang Du, Hisashi Kino
Continuous Peripheral Blood Pressure Measurement with ECG and PPG Signals at Fingertips. BioCAS 2018: 1-4 - 2017
- [c42]Kenji Shimokawa, Zhengyang Qian, Yoshiki Takezawa, Hisashi Kino
Experimental evaluation of stimulus current generator with Laplacian edge-enhancement for 3-D stacked retinal prosthesis chip. BioCAS 2017: 1-4 - [c41]Yoshiki Takezawa, Koji Kiyoyama, Kenji Shimokawa, Zhengyang Qian, Hisashi Kino
Ultrawide range square wave impedance analysis circuit with ultra-slow ring-oscillator using gate-induced drain-leakage current. BioCAS 2017: 1-4 - 2016
- [j3]Takafumi Fukushima
Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration. Micromachines 7(10): 184 (2016) - [c40]Takafumi Fukushima
New concept of TSV formation methodology using Directed Self-Assembly (DSA). 3DIC 2016: 1-4 - [c39]Hisashi Kino
Drastic reduction of keep-out-zone in 3D-IC by local stress suppression with negative-CTE filler. 3DIC 2016: 1-4 - [c38]Mariappan Murugesan, Jichel Bea, Takafumi Fukushima
Improving the integrity of Ti barrier layer in Cu-TSVs through self-formed TiSix for via-last TSV technology. 3DIC 2016: 1-4 - [c37]Koji Kiyoyama, Yoshiki Takezawa, Tatsuya Goto, Keita Ito, Shoma Uno, Kenji Shimokawa, Satoru Nishino, Hisashi Kino
Wide-range and precise tissue impedance analysis circuit with ultralow current source using gate-induced drain-leakage current. BioCAS 2016: 304-307 - 2015
- [c36]K. W. Lee, Ji Chel Bea, Mitsu Koyanagi, Takafumi Fukushima
Advanced 2.5D/3D hetero-integration technologies at GINTI, Tohoku University. 3DIC 2015: FS2.1-FS2.5 - [c35]Seiya Tanikawa, Hisashi Kino
Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors. 3DIC 2015: TS3.1.1-TS3.1.4 - [c34]Takafumi Fukushima
Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding. 3DIC 2015: TS7.4.1-TS7.4.4 - [c33]Mariappan Murugesan, Jichoel Bea, Hiroyuki Hashimoto, K. W. Lee, Mitsu Koyanagi, Takafumi Fukushima
Mitigating thermo mechanical stress in high-density 3D-LSI through dielectric liners in Cu- through silicon Via _ µ-RS and µ-XRD study. 3DIC 2015: TS8.10.1-TS8.10.5 - [c32]Hisashi Kino
Consideration of microbump layout for reduction of local bending stress due to CTE Mismatch in 3D IC. 3DIC 2015: TS8.26.1-TS8.26.4 - [c31]Kang Wook Lee, Ji Chel Bea, Mariappan Murugesan, Takafumi Fukushima
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM. IRPS 2015: 4 - 2014
- [c30]Takafumi Fukushima
Tiny VCSEL chip self-assembly for advanced chip-to-wafer 3D and hetero integration. 3DIC 2014: 1-4 - [c29]Fumihiro Inoue
Cu seeding using electroless deposition on Ru liner for high aspect ratio through-Si vias. 3DIC 2014: 1-4 - [c28]Mariappan Murugesan, Takafumi Fukushima
Micro-XRD investigation of fine-pitch Cu-TSV induced thermo-mechanical stress in high-density 3D-LSI. 3DIC 2014: 1-4 - 2013
- [c27]Hiroyuki Hashimoto, Takafumi Fukushima
Highly efficient TSV repair technology for resilient 3-D stacked multicore processor system. 3DIC 2013: 1-5 - [c26]Kouji Kiyoyama, Y. Sato, Hiroyuki Hashimoto, Kang Wook Lee, Takafumi Fukushima
A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor. 3DIC 2013: 1-4 - [c25]Kang Wook Lee, Seiya Tanikawa, Mariappan Murugesan, H. Naganuma, Jichoel Bea, Takafumi Fukushima
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. 3DIC 2013: 1-4 - [c24]Mariappan Murugesan, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima
Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. 3DIC 2013: 1-4 - [c23]Shota Kanno, Sang-Rim Lee, T. Harashima, Toshinobu Kuki, Hisashi Kino
Multiple optical stimulation to neuron using Si opto-neural probe with multiple optical waveguides and metal-cover for optogenetics. EMBC 2013: 253-256 - 2012
- [c22]H. Naganuma, Kouji Kiyoyama, Tetsu Tanaka
A 37 × 37 pixels artificial retina chip with edge enhancement function for 3-D stacked fully implantable retinal prosthesis. BioCAS 2012: 212-215 - 2011
- [j2]Takafumi Fukushima
Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration. Micromachines 2(1): 49-68 (2011) - [c21]Takafumi Fukushima
Temporary bonding strength control for self-assembly-based 3D integration. 3DIC 2011: 1-4 - [c20]Kouji Kiyoyama, Kang Wook Lee, Takafumi Fukushima
A very low area ADC for 3-D stacked CMOS image processing system. 3DIC 2011: 1-4 - [c19]Kang Wook Lee, Jichoel Bea, Takafumi Fukushima
High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs. 3DIC 2011: 1-4 - [c18]Mariappan Murugesan, Hideto Hashiguchi, Harufumi Kobayashi, Takafumi Fukushima
W/Cu TSVs for 3D-LSI with minimum thermo-mechanical stress. 3DIC 2011: 1-4 - [c17]Mariappan Murugesan, Harufumi Kobayashi, Takafumi Fukushima
High density Cu-TSVs and reliability issues. 3DIC 2011: 1-4 - [c16]Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima
Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI. 3DIC 2011: 1-4 - [c15]Yuki Ohara, Kang Wook Lee, Takafumi Fukushima
Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration. 3DIC 2011: 1-4 - 2010
- [c14]Takafumi Fukushima
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. 3DIC 2010: 1-5 - [c13]Kouji Kiyoyama, Kang Wook Lee, Takafumi Fukushima
A block-parallel signal processing system for CMOS image sensor with three-dimensional structure. 3DIC 2010: 1-4 - [c12]Mariappan Murugesan, Yuki Ohara, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima
Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding. 3DIC 2010: 1-5 - [c11]Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima
Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI. 3DIC 2010: 1-4 - [c10]Mitsumasa Koyanagi, Takafumi Fukushima
Three-dimensional integration technology using through-si via based on reconfigured wafer-to-wafer bonding. CICC 2010: 1-4
2000 – 2009
- 2009
- [j1]Mitsumasa Koyanagi, Takafumi Fukushima
High-Density Through Silicon Vias for 3-D LSIs. Proc. IEEE 97(1): 49-59 (2009) - [c9]Ji Chel Bea, Mariappan Murugesan, Yuki Ohara, Akihiro Noriki
Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration. 3DIC 2009: 1-5 - [c8]Takafumi Fukushima
Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch. 3DIC 2009: 1-4 - [c7]Yoshiyuki Kaiho, Yuki Ohara, Hirotaka Takeshita, Kouji Kiyoyama, Kang Wook Lee, Tetsu Tanaka
3D integration technology for 3D stacked retinal chip. 3DIC 2009: 1-4 - [c6]Kouji Kiyoyama, Yuki Ohara, Kang Wook Lee, Y. Yang, Takafumi Fukushima
A parallel ADC for high-speed CMOS image processing system with 3D structure. 3DIC 2009: 1-4 - [c5]Kang Wook Lee, Shigeyuki Kanno, Yuki Ohara, Kouji Kiyoyama, Ji Chel Bea, Takafumi Fukushima
Heterogeneous integration technology for MEMS-LSI multi-chip module. 3DIC 2009: 1-6 - [c4]Yuki Ohara, Akihiro Noriki, Katsuyuki Sakuma
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. 3DIC 2009: 1-6 - [c3]Mitsumasa Koyanagi, Takafumi Fukushima
Three-dimensional integration technology and integrated systems. ASP-DAC 2009: 409-415
1990 – 1999
- 1996
- [c2]Katsuyoshi Sato, Takeshi Manabe, Toshio Ihara, Hiroshi Saito, Shigeru Ito, Tetsu Tanaka, Kazuyoshi Sugai, Norichika Ohmi, Yasushi Murakami, Masanori Shibayama, Yoshihiko Konishi, Tsuneto Kimura:
Measurements of reflection and transmission characteristics of interior structures of office building in the 60 GHz band. PIMRC 1996: 14-18 - 1994
- [c1]Tetsu Tanaka:
A study on multipath propagation characteristics for RAKE receiving technique. PIMRC 1994: 711-714
Coauthor Index
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last updated on 2024-10-07 22:09 CEST by the dblp team
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