default search action
Kevin J. Nowka
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [j16]Lei Zhao, Dugan Um, Kevin J. Nowka, Jose Luis Landivar-Scott, Juan Landivar, Mahendra Bhandari:
Cotton yield prediction utilizing unmanned aerial vehicles (UAV) and Bayesian neural networks. Comput. Electron. Agric. 226: 109415 (2024) - [j15]Sambandh Bhusan Dhal
, Stavros Kalafatis, Ulisses Braga-Neto, Krishna Chaitanya Gadepally, Jose Luis Landivar-Scott
Testing the Performance of LSTM and ARIMA Models for In-Season Forecasting of Canopy Cover (CC) in Cotton Crops. Remote. Sens. 16(11): 1906 (2024) - 2023
- [c43]Krishna Chaitanya Gadepally, Sambandh Bhusan Dhal, Mahendra Bhandari
A Deep Transfer Learning based approach for forecasting spatio-temporal features to maximize yield in cotton crops. CISS 2023: 1-4 - [c42]Krishna Chaitanya Gadepally, Sambandh Bhusan Dhal, Stavros Kalafatis, Kevin J. Nowka
Realistic Predictors for Regression and Semantic Segmentation. SERA 2023: 153-155
2010 – 2019
- 2015
- [j14]Fadi H. Gebara, H. Peter Hofstee, Kevin J. Nowka
Second-Generation Big Data Systems. Computer 48(1): 36-41 (2015) - 2012
- [c41]Kevin J. Nowka
Transforming memory systems: Optimizing for client value on emerging workloads. VLSI-DAT 2012: 1-2 - 2011
- [j13]Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Thomas Fröhnel, Sudesh Saroop, Sani R. Nassif, Kevin J. Nowka
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2010-2016 (2011) - 2010
- [j12]Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka
On-Chip Delay Measurement Based Response Analysis for Timing Characterization. J. Electron. Test. 26(6): 599-619 (2010) - [c40]Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Sudesh Saroop, Tuyet Nguyen, Thomas Fröhnel, Antje Müller, Christopher M. Durham, Rolf Sautter, Bryan Lloyd, Bryan J. Robbins, Juergen Pille, Sani R. Nassif, Kevin J. Nowka
A 32nm 0.5V-supply dual-read 6T SRAM. CICC 2010: 1-4 - [c39]Kevin J. Nowka
Technology variability and uncertainty implications for power- efficient VLSI systems. ISLPED 2010: 239-240 - [c38]Sani R. Nassif, Kevin J. Nowka
Physical design challenges beyond the 22nm node. ISPD 2010: 13-14
2000 – 2009
- 2009
- [c37]Rouwaida Kanj, Rajiv V. Joshi, Jente B. Kuang, J. Kim, Mesut Meterelliyoz, William R. Reohr, Sani R. Nassif, Kevin J. Nowka
Statistical yield analysis of silicon-on-insulator embedded DRAM. ISQED 2009: 190-194 - 2008
- [j11]Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
Performance-Optimized Design for Parametric Reliability. J. Electron. Test. 24(1-3): 129-141 (2008) - [j10]Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka
Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. Very Large Scale Integr. Syst. 16(12): 1657-1665 (2008) - [c36]Kevin J. Nowka
Characterization and design for variability and reliability. CICC 2008: 341-346 - [c35]Jente B. Kuang, Abraham Mathews, John Barth, Fadi H. Gebara, Tuyet Nguyen, Jeremy D. Schaub, Kevin J. Nowka
An on-chip dual supply charge pump system for 45nm PD SOI eDRAM. ESSCIRC 2008: 66-69 - [c34]Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka
A Design Model for Random Process Variability. ISQED 2008: 734-737 - 2007
- [j9]Harmander Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka
Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 15(11): 1215-1224 (2007) - [c33]Wei Zhao, Yu Cao, Frank Liu, Kanak Agarwal, Dhruva Acharyya, Sani R. Nassif, Kevin J. Nowka
Rigorous extraction of process variations for 65nm CMOS design. ESSCIRC 2007: 89-92 - [c32]Kanak Agarwal, Kevin J. Nowka
Dynamic Power Management by Combination of Dual Static Supply Voltages. ISQED 2007: 85-92 - [c31]Fadi H. Gebara, Jeremy D. Schaub, Tuyet Nguyen, Jarom Peña, Ivan Vo, David Boerstler, Kevin J. Nowka
A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology. ISSCC 2007: 312-313 - 2006
- [c30]Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
Adaptive Design for Performance-Optimized Robustness. DFT 2006: 3-11 - [c29]Harmander Deogun, Dennis Sylvester, Kevin J. Nowka
Fine grained multi-threshold CMOS for enhanced leakage reduction. ISCAS 2006 - [c28]Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
A dual-VDD boosted pulsed bus technique for low power and low leakage operation. ISLPED 2006: 73-78 - [c27]Praveen Elakkumanan, Jente B. Kuang, Kevin J. Nowka
SRAM Local Bit Line Access Failure Analyses. ISQED 2006: 204-209 - [c26]Kanak Agarwal, Kevin J. Nowka
Power Gating with Multiple Sleep Modes. ISQED 2006: 633-637 - [c25]Xiao Yan Yu, Robert K. Montoye, Kevin J. Nowka
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. PATMOS 2006: 47-55 - [c24]Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown:
Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. VLSI Design 2006: 89-93 - [c23]Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka
A Scheme for On-Chip Timing Characterization. VTS 2006: 24-29 - 2005
- [j8]Sachin S. Sapatnekar
Guest Editors' Introduction: New Dimensions in 3D Integration. IEEE Des. Test Comput. 22(6): 496-497 (2005) - [c22]Jente B. Kuang, Hung C. Ngo, Kevin J. Nowka
A Low-Overhead Virtual Rail Technique for SRAM Leakage Power Reduction. ICCD 2005: 574-584 - [c21]Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka
Controlled-Load Limited Switch Dynamic Logic Circuit. ISQED 2005: 83-87 - [c20]Harmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. ISQED 2005: 88-93 - [c19]Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka
Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED 2005: 284-290 - [c18]Harmander Singh Deogun, Dennis Sylvester, Rahul M. Rao, Kevin J. Nowka:
Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength. SoCC 2005: 147-150 - 2004
- [j7]Alan J. Drake, Kevin J. Nowka
Resonant clocking using distributed parasitic capacitance. IEEE J. Solid State Circuits 39(9): 1520-1528 (2004) - [c17]Juan Antonio Carballo, Kevin J. Nowka
Requirement-based design methods for adaptive communications links. DAC 2004: 93-98 - [c16]Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka:
A low latency and low power dynamic Carry Save Adder. ISCAS (2) 2004: 477-480 - [c15]Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
Approaches to run-time and standby mode leakage reduction in global buses. ISLPED 2004: 188-193 - 2003
- [j6]Kevin J. Nowka
The design and application of the PowerPC 405LP energy-efficient system-on-a-chip. IBM J. Res. Dev. 47(5-6): 631-640 (2003) - [c14]Alan J. Drake, Kevin J. Nowka
Resonant clocking using distributed parasitic capacitance. CICC 2003: 647-650 - [c13]Alan J. Drake, Kevin J. Nowka, Richard B. Brown:
Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI. VLSI-SOC 2003: 263- - 2002
- [j5]Kevin J. Nowka
A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling. IEEE J. Solid State Circuits 37(11): 1441-1447 (2002) - [j4]Ohsang Kwon, Kevin J. Nowka, Earl E. Swartzlander Jr.:
A 16-Bit by 16-Bit MAC Design Using Fast 5: 3 Compressor Cells. J. VLSI Signal Process. 31(2): 77-89 (2002) - 2001
- [c12]Martin S. Schmookler, Kevin J. Nowka
Leading Zero Anticipation and Detection-A Comparison of Methods. IEEE Symposium on Computer Arithmetic 2001: 7-12 - [c11]Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka
A fast hybrid carry-lookahead/carry-select adder design. ACM Great Lakes Symposium on VLSI 2001: 149-152 - [c10]Hoang Q. Dao, Kevin J. Nowka
Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation. ISLPED 2001: 56-59 - 2000
- [j3]David H. Allen, Sang H. Dhong, H. Peter Hofstee, Jens Leenstra, Kevin J. Nowka
Custom circuit design as a driver of microprocessor performance. IBM J. Res. Dev. 44(6): 799-822 (2000) - [c9]Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka
A 16-Bit x 16-Bit MAC Design Using Fast 5: 2 Compressors. ASAP 2000: 235- - [c8]Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka
"Timing closure by design, " a high frequency microprocessor design methodology. DAC 2000: 712-717
1990 – 1999
- 1999
- [c7]H. Peter Hofstee, Kevin J. Nowka
Beyond 1 GHz. CICC 1999: 57-61 - 1998
- [j2]Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka
A 1.0-GHz single-issue 64-bit powerPC integer processor. IEEE J. Solid State Circuits 33(11): 1600-1608 (1998) - [j1]H. Peter Hofstee, Sang H. Dhong, David Meltzer, Kevin J. Nowka
Designing for a gigahertz [guTS integer processor]. IEEE Micro 18(3): 66-74 (1998) - [c6]Kevin J. Nowka
Circuit design techniques for a gigahertz integer microprocessor. ICCD 1998: 11-16 - [c5]Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka
Design methodology for a 1.0 GHz microprocessor. ICCD 1998: 17-23 - [c4]David F. Heidel, Sang H. Dhong, H. Peter Hofstee, Michael Immediato, Kevin J. Nowka, Joel Silberman, Kevin Stawiasz:
High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor. VTS 1998: 234-238 - 1997
- [c3]Kevin J. Nowka
Circuits and Microarchitecture for Gigahertz VLSI Designs. ARVLSI 1997: 284-287 - 1995
- [c2]Michael J. Flynn, Kevin J. Nowka
The SNAP Project: Towards Sub-Nanosecond Arithmetic. IEEE Symposium on Computer Arithmetic 1995: 75- - [c1]Kevin J. Nowka
System Design Using Wave-Pipelining: A CMOS VLSI Vector Unit. ISCAS 1995: 2301-2304
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-09 21:27 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: