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Norbert Seifert
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2020 – today
- 2020
- [c17]Bahar Ajdari, Samwel Sekwao, Ricardo Ascázubi, Adam Neale, Norbert Seifert:
On the Correlation of Laser-induced and High-Energy Proton Beam-induced Single Event Latchup. IRPS 2020: 1-5 - [c16]Rohit Grover, Tony Acosta, C. AnDyke, Emre Armagan, C. Auth, Sunny Chugh, K. Downes, M. Hattendorf, N. Jack, S. Joshi, R. Kasim, Gerald S. Leatherman, S.-H. Lee, C.-Y. Lin, A. Madhavan, H. Mao, A. Lowrie, G. Martin, G. McPherson, Pinakpani Nayak, Adam Neale, D. Nminibapiel, Benjamin Orr, James Palmer, C. M. Pelto, S. S. Poon, I. Post, Tanmoy Pramanik, Anisur Rahman, Stephen Ramey, Norbert Seifert, K. Sethi, Anthony Schmitz, H. Wu, A. Yeoh:
A Reliability Overview of Intel's 10+ Logic Technology. IRPS 2020: 1-6
2010 – 2019
- 2015
- [c15]Norbert Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Nikunj Patel:
Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets. IRPS 2015: 2 - [c14]Wei Wu, Norbert Seifert:
MBU-Calc: A compact model for Multi-Bit Upset (MBU) SER estimation. IRPS 2015: 2 - 2013
- [c13]Arkady Bramnik, Andrei Sherban, Norbert Seifert:
Timing vulnerability factors of sequential elements in modern microprocessors. IOLTS 2013: 55-60 - 2010
- [j3]Norbert Seifert:
Radiation-induced Soft Errors: A Chip-level Modeling Perspective. Found. Trends Electron. Des. Autom. 4(2-3): 99-221 (2010) - [c12]Arijit Biswas, Charles Recchia, Shubhendu S. Mukherjee, Vinod Ambrose, Leo Chan, Aamer Jaleel, Athanasios E. Papathanasiou, Mike Plaster, Norbert Seifert:
Explaining cache SER anomaly using DUE AVF measurement. HPCA 2010: 1-12
2000 – 2009
- 2008
- [c11]Norbert Seifert:
Special Session 1: Radiation Hardening Techniques. IOLTS 2008: 43-44 - [c10]Norbert Seifert:
Soft Error Rates of Hardened Sequentials utilizing Local Redundancy. IOLTS 2008: 49-50 - 2007
- [c9]Subhasish Mitra, Pia N. Sanda, Norbert Seifert:
Soft Errors: Technology Trends, System Effects, and Protection Techniques. IOLTS 2007: 4 - [c8]Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu:
Design for Resilience to Soft Errors and Variations. IOLTS 2007: 23-28 - 2006
- [j2]Ming Zhang, Subhasish Mitra, T. M. Mak, Norbert Seifert, Nicholas J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel:
Sequential Element Design With Built-In Soft Error Resilience. IEEE Trans. Very Large Scale Integr. Syst. 14(12): 1368-1378 (2006) - [c7]Norbert Seifert:
Extending Moore's Law into the next Decade - the SER Challenge. IOLTS 2006: 7 - [c6]Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim:
Combinational Logic Soft Error Correction. ITC 2006: 1-9 - [c5]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC (Selected Papers) 2006: 143-156 - [c4]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC 2006: 332-337 - 2005
- [j1]Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim:
Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim. Computer 38(2): 43-52 (2005) - [c3]Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang:
Logic soft errors in sub-65nm technologies design and CAD challenges. DAC 2005: 2-4 - [c2]Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff, Norbert Seifert:
Node sensitivity analysis for soft errors in CMOS logic. ITC 2005: 9 - [c1]Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim:
Logic soft errors: a major barrier to robust platform design. ITC 2005: 10
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