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Zhe Feng 0002
Person information
- affiliation: University of California, Los Angeles, USA
Other persons with the same name
- Zhe Feng — disambiguation page
- Zhe Feng 0001 — Fudan University, Shanghai, China
- Zhe Feng 0003 — Robert Bosch Research and Technology Center, Palo Alto, CA, USA
- Zhe Feng 0004
— Google Research, Mountain View, CA, USA (and 2 more)
- Zhe Feng 0005 — University of Colorado Boulder, Boulder, CO, USA
- Zhe Feng 0006 — Nantong University, Nantong, China
- Zhe Feng 0007
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2010 – 2019
- 2014
- [j6]Zhe Feng, Naifeng Jing, Lei He:
IPF: In-Place X-Filling Algorithm for the Reliability of Modern FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2225-2228 (2014) - 2012
- [j5]Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Lei He:
SEU fault evaluation and characteristics for SRAM-based FPGA architectures and synthesis algorithms. ACM Trans. Design Autom. Electr. Syst. 18(1): 13:1-13:18 (2012) - 2011
- [c9]Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He:
Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. FPL 2011: 282-285 - [c8]Lintao Cui, Jing Chen, Yu Hu, Jinjun Xiong
Acceleration of Multi-agent Simulation on FPGAs. FPL 2011: 470-473 - [c7]Zhe Feng, Naifeng Jing, GengSheng Chen, Yu Hu, Lei He:
IPF: In-Place X-Filling to Mitigate Soft Errors in SRAM-Based FPGAs. FPL 2011: 482-485 - 2010
- [c6]Ju-Yueh Lee, Zhe Feng, Lei He:
In-place decomposition for robustness in FPGA. ICCAD 2010: 143-148
2000 – 2009
- 2009
- [c5]Zhe Feng, Yu Hu, Lei He, Rupak Majumdar:
IPR: In-Place Reconfiguration for FPGA fault tolerance. ICCAD 2009: 105-108 - 2008
- [j4]Tom Tong Jing, Yu Hu, Zhe Feng, Xianlong Hong, Xiaodong Hu, Guiying Yan:
A full-scale solution to the rectilinear obstacle-avoiding Steiner problem. Integr. 41(3): 413-425 (2008) - [j3]Zhen Cao, Tong Jing, Jinjun Xiong
Fashion: A Fast and Accurate Solution to Global Routing Problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4): 726-737 (2008) - [c4]Yu Hu, Zhe Feng, Lei He, Rupak Majumdar:
Robust FPGA resynthesis based on fault-tolerant Boolean matching. ICCAD 2008: 706-713 - 2007
- [j2]Tom Tong Jing, Zhe Feng, Yu Hu, Xianlong Hong, Xiaodong Hu, Guiying Yan:
lambda-OAT: lambda-Geometry Obstacle-Avoiding Tree Construction With O(nlog n) Complexity. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 2073-2079 (2007) - 2006
- [j1]Yu Hu, Tong Jing, Zhe Feng, Xianlong Hong, Xiaodong Hu, Guiying Yan:
ACO-Steiner: Ant Colony Optimization Based Rectilinear Steiner Minimal Tree Algorithm. J. Comput. Sci. Technol. 21(1): 147-152 (2006) - [c3]Yiyu Shi, Tong Jing, Lei He, Zhe Feng, Xianlong Hong:
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model. ASP-DAC 2006: 630-635 - [c2]Zhe Feng, Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan:
An O(nlogn) algorithm for obstacle-avoiding routing tree construction in the lambda-geometry plane. ISPD 2006: 48-55 - 2005
- [c1]Yu Hu, Tong Jing, Xianlong Hong, Zhe Feng, Xiaodong Hu, Guiying Yan:
An-OARSMan: obstacle-avoiding routing tree construction with good length performance. ASP-DAC 2005: 7-12
Coauthor Index
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