default search action
20th RTCSA 2014: Chongqing, China
- 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, Chongqing, China, August 20-22, 2014. IEEE Computer Society 2014, ISBN 978-1-4799-3953-4
- Glenn A. Elliott, Namhoon Kim, Jeremy P. Erickson, Cong Liu, James H. Anderson:
Minimizing response times of automotive dataflows on multicore. 1-10 - Xianlu Luo, Duo Liu, Kan Zhong, Dan Zhang, Yi Lin, Jie Dai, Weichen Liu
:
Enhancing lifetime of NVM-based main memory with bit shifting and flipping. 1-7 - Alexei Colin, Arvind Kandhalu, Ragunathan Rajkumar:
Energy-efficient allocation of real-time applications onto Heterogeneous Processors. 1-10 - Anas Toma
Computation offloading for sporadic real-time tasks. 1-10 - Chen-Wei Huang, Timon Kelter, Bjoern Boenninghoff, Jan C. Kleinsorge, Michael Engel, Peter Marwedel, Shiao-Li Tsao:
Static WCET analysis of the H.264/AVC decoder exploiting coding information. 1-7 - Zhenmin Li, Avinash Malik, Zoran A. Salcic
TACO: A scalable framework for timing analysis and code optimization of synchronous programs. 1-8 - Xiaoting Li, Olivier Cros, Laurent George:
The Trajectory approach for AFDX FIFO networks revisited and corrected. 1-10 - Youcheng Sun
Improving the response time analysis of global fixed-priority multiprocessor scheduling. 1-9 - Xiaomin Wei
Hazard analysis for AADL model. 1-10 - Renato Mancuso
A hardware architecture to deploy complex multiprocessor scheduling algorithms. 1-10 - Süleyman Savas, Essayas Gebrewahid, Zain-ul-Abdin
An evaluation of code generation of dataflow languages on manycore architectures. 1-9 - Pei-Shu Huang, Quan-Chung Chen, Chen-Wei Huang, Shiao-Li Tsao:
An efficient thermal estimation scheme for microprocessors. 1-10 - Gang Chen, Kai Huang, Alois C. Knoll
Adaptive dynamic power management for hard real-time pipelined Multiprocessor Systems. 1-10 - Maikon Adiles Fernandez Bueno, José A. M. de Holanda, Erinaldo Pereira, Eduardo Marques
Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures. 1-10 - Gangyong Jia, Liang Shi, Jian Wan, Youwei Yuan, Xi Li, Dong Dai:
PUMA: Pseudo unified memory architecture for single-ISA heterogeneous multi-core systems. 1-10 - Yannick Allard, Geoffrey Nelissen
A context aware cache controller to bridge the gap between theory and practice in real-time systems. 1-10 - Mohammad Ashjaei
Reduced buffering solution for multi-hop HaRTES switched Ethernet networks. 1-10 - Shouzhen Gu, Qingfeng Zhuge, Jingtong Hu
Minimum-cost data allocation with guaranteed probability on multiple types of memory. 1-9 - Tao Qian, Frank Mueller, Yufeng Xin
A real-time distributed hash table. 1-10 - Kai Li, Xin Wang, Jianhua Shen:
Design and implementation of a multi-node wifi heart rate variability analysis system. 1-6 - Wei-Lun Zhao, Yiyuan Xie, Hong-Jun Che, Ye-Xiong Huang, Weihua Xu, Xin Li, Jia-Chao Li:
Performance improvement in mesh-based optical networks-on-chip. 1-6 - Qinfen Hao:
Keynote: "High throughput computing data center". 1 - Zongwei Zhu, Xi Li, Chao Wang, Xuehai Zhou:
Memory power optimization on different memory address mapping schemas. 1-9 - Peng Chen, Chao Wang, Xi Li, Xuehai Zhou:
Multi-objective aware design flow for coarse-grained systems on chip. 1-8 - Wei-Ning Huang, Sheng-Wei Cheng, Che-Wei Chang, Yu-Chen Wu, Tei-Wei Kuo
The acceleration of pipeline workloads under the FPGA area and bandwidth constraints. 1-9 - Tei-Wei Kuo:
Keynote: "Non-volatile memory innovation". 1 - Meng Liu, Moris Behnam, Shinpei Kato, Thomas Nolte:
An adaptive server-based scheduling framework with capacity reclaiming and borrowing. 1-10 - Martin Böhnert, Christoph Scholl:
A dynamic virtual memory management under real-time constraints. 1-10 - Ralf Jahr, Mike Gerdes, Theo Ungerer, Haluk Ozaktas, Christine Rochange, Pavel G. Zaykov:
Effects of structured parallelism by parallel design patterns on embedded hard real-time systems. 1-10 - Chen Pan, Mimi Xie, Jingtong Hu
Wear-leveling for PCM main memory on embedded system via page management and process scheduling. 1-9 - Lei Yang, Weichen Liu
Contention-aware task and communication co-scheduling for network-on-chip based Multiprocessor System-on-Chip. 1-8 - Weiwen Jiang, Qingfeng Zhuge, Juan Yi, Lei Yang, Edwin Hsing-Mean Sha:
On self-timed ring for consistent mapping and maximum throughput. 1-9 - Guangdong Liu, Ying Lu, Shige Wang, Zonghua Gu:
Partitioned multiprocessor scheduling of mixed-criticality parallel jobs. 1-10 - Wendi Nie, Yaoxin Duan
Energy efficient routing techniques with guaranteed reliability based on multi-level uncertain graph. 1-9 - Wei Jing, Nan Guan
Performance isolation for real-time systems with Xen hypervisor on multi-cores. 1-7 - Ye-Xiong Huang, Yiyuan Xie, Wei-Lun Zhao, Hong-Jun Che, Weihua Xu, Xin Li, Jia-Chao Li:
A plasmonic refractive index sensor based on a MIM waveguide with a side-coupled nanodisk resonator. 1-5 - Debao Wei, Youhua Gong, Liyan Qiao, Libao Deng:
A hardware-software co-design experiments platform for NAND flash based on Zynq. 1-7 - Borislav Nikolic, Patrick Meumeu Yomsi
Worst-case communication delay analysis for many-cores using a Limited Migrative Model. 1-10 - Zhi Qi, Wen Wen
An energy efficient OpenCL implementation of a fingerprint verification system on heterogeneous mobile device. 1-8 - Zhiyong Zhang, Peng Liu, Lei Ju, Zhiping Jia:
Energy efficient real-time task scheduling for embedded systems with hybrid main memory. 1-10 - James H. Anderson, Jeremy P. Erickson, UmaMaheswari C. Devi, Benjamin N. Casses:
Optimal semi-partitioned scheduling in soft real-time systems. 1-10 - Kai Liu, Joseph Kee-Yin Ng
Towards scalable, fair and robust data dissemination via cooperative vehicular communications. 1-9 - Tzu-Jung Huang, Chien-Chung Ho, Po-Chun Huang, Yuan-Hao Chang
Current-aware scheduling for flash storage devices. 1-10 - Edwin Hsing-Mean Sha, Jörg Henkel, Kaijie Wu, Tarek F. Abdelzaher, Hojung Cha:
Messages from the conference chairs. 1 - Nien-I Hsu, Tseng-Yi Chen
Dynamic tail packing to optimize space utilization of file systems in embedded computing systems. 1-10 - Youcheng Sun
Component-based analysis of hierarchical scheduling using linear hybrid automata. 1-10 - Leonardo Ecco, Sebastian Tobuschat, Selma Saidi, Rolf Ernst:
A mixed critical memory controller using bank privatization and fixed priority scheduling. 1-10 - N. Saranya, R. C. Hansdah:
An implementation of partitioned scheduling scheme for hard real-time tasks in multicore Linux with fair share for Linux tasks. 1-9 - Antonio Paolillo
Power minimization for parallel real-time systems with malleable jobs and homogeneous frequencies. 1-10 - Hang Su, Nan Guan
Service guarantee exploration for mixed-criticality systems. 1-10 - Unmesh D. Bordoloi, Amir Aminifar, Petru Eles, Zebo Peng:
Schedulability analysis of Ethernet AVB switches. 1-10 - Hongxing Wei, Qiang Mao:
A dynamic covering algorithm of wireless sensor network based on CVT. 1-6 - Jianqing Xiao, Pengwei Lv, Mian Lou, Xunying Zhang, Xubang Shen:
A task-level superscalar microarchitecture for large scale chip multiprocessors. 1-8 - Zhao-Rong Lai, Che-Wei Chang, Xue Liu, Tei-Wei Kuo
Deadline-aware load balancing for MapReduce. 1-10 - Weihua Xu, Yiyuan Xie, Hong-Jun Che, Weilun Zhao, Ye-Xiong Huang, Xin Li, Jia-Chao Li:
Performance optimization in Torus-based optical networks-on-chip. 1-6 - Vikram Gupta, Nuno Pereira
Network-Harmonized Scheduling for multi-application sensor networks. 1-10 - Jiajin Zhang, Liu Di, Lichang Chen:
Design and implementation of gaze tracking system with iPad. 1-5 - Tayfun Gezgin, Stefan Henkler, Ingo Stierand, Achim Rettberg:
Impact analysis for timing requirements on real-time systems. 1-10 - Renato Mancuso
Light-PREM: Automated software refactoring for predictable execution on COTS embedded systems. 1-10 - Jing Li, Kunal Agrawal, Christopher D. Gill, Chenyang Lu:
Federated scheduling for stochastic parallel real-time tasks. 1-10 - Hua Nie, Gongbo Li, Xingkui Liu, Xiaojun Yang, Keping Long:
A management architecture of cloud server systems. 1-7 - Junhua Zhao, Hejun Wu, Yongjian Zhao
CCM: Low cost dynamic data exchange to emulate RAM on NAND flash. 1-9 - Mimi Xie, Chen Pan, Jingtong Hu
Non-volatile registers aware instruction selection for embedded systems. 1-9 - HeeJong Park, Avinash Malik, Zoran A. Salcic
Times square - marriage of real-time and logical-time in GALS and synchronous languages. 1-10 - Chi-Sheng Shih
Workload migration framework for streaming applications on smartphones. 1-8 - Chiyuan Ma, Xiaoqiang Ni:
A memory schedule policy oriented to stream architecture. 1-5 - Kilian Kempf, Frank Slomka:
Direct handling of infeasible paths in the event dependency analysis. 1-10 - Martijn M. H. P. van den Heuvel, Moris Behnam, Reinder J. Bril
Optimal and fast composition of resource-sharing components in hierarchical real-time systems. 1-12
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-18 18:34 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: