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8th CANDAR 2020: Naha, Japan
- Eighth International Symposium on Computing and Networking, CANDAR 2020, Naha, Japan, November 24-27, 2020. IEEE 2020, ISBN 978-1-7281-8221-6
Long Papers
- Shilei Cao, Kouichi Sakurai:
Face completion with pyramid semantic attention and latent codes. 1-8 - Attila Egri-Nagy, Antti Törmänen:
Derived metrics for the game of Go - intrinsic network strength assessment and cheat-detection. 9-18 - Yosuke Ide, Nobuyuki Yamasaki:
A Learning-based Fetch Thread Gating Mechanism for A Simultaneous Multithreading Processor. 19-28 - Tomohiro Imanaga, Koji Nakano
, Masaki Tao, Ryota Yasudo
Efficient GPU Implementation for Solving the Maximum Independent Set Problem. 29-38 - Hiroshi Kagawa, Yasuaki Ito, Koji Nakano
Fully-Pipelined Architecture for Simulated Annealing-based QUBO Solver on the FPGA. 39-48 - Andreas Klos, Marius Rosenbaum, Wolfram Schiffmann:
Emergency Landing Field Identification Based on a Hierarchical Ensemble Transfer Learning Model. 49-58 - Masahito Kumagai, Kazuhiko Komatsu, Fumiyo Takano, Takuya Araki, Masayuki Sato, Hiroaki Kobayashi:
Combinatorial Clustering Based on an Externally-Defined One-Hot Constraint. 59-68 - Junya Nakamura
Evacuation from a Finite 2D Square Grid Field by a Metamorphic Robotic System. 69-78 - Srivattsan Sridharan, Shravan Gaonkar, José A. B. Fortes:
Bandit-based Run-time Adaptation of Cache Replacement Policies in Content Management Systems. 79-88
Regular Papers
- Taichi Aoki, Atsuhiro Goto:
Graph visualization of the dark web hyperlink. 89-94 - Ángel Dacal-Nieto
Use cases and success stories of a data analytics system in an automotive Paint Shop. 95-100 - Naoki Ebata, Yoko Isobe, Ryusuke Egawa, Hiroyuki Takizawa
Polymorphic Data Layout for SX-Aurora TSUBASA Vector Engines. 101-107 - Masaki Furukawa, Tomoya Itsubo, Hiroki Matsutani:
An In-Network Parameter Aggregation using DPDK for Multi-GPU Deep Learning. 108-114 - Shingo Hasegawa, Masashi Hisai, Hiroki Shizuya:
Public-key Projective Arithmetic Functional Encryption. 115-121 - Kenta Inoue:
Maximum Expressive Number of Threshold Neural Networks. 122-127 - Toshikazu Ishida, Shuichi Inokuchi:
Commutativity of Composition of some Elementary Cellular Automata on Monoids. 128-133 - Haruki Ishizaki, Ryohei Saka, Eitaro Kohno, Yoshiaki Kakuda:
On the Loop Suppression Method by Utilizing Information of Master Terminals for Neighboring Terminals in Bluetooth MANETs. 134-140 - Sora Isobe, Yoichi Tomioka
Low-bit Quantized CNN Acceleration based on Bit-serial Dot Product Unit with Zero-bit Skip. 141-145 - Shungo Kumazawa, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
ExtraFerns: Fully Parallel Ensemble Learning Technique with Non-Greedy yet Minimal Memory Access Training. 146-152 - Kota Matsuyama, Tomonobu Ozaki:
Extraction of Interpretable Decision Sets in Graph Databases. 153-159 - Hiromasa Miura, Rikuya Matsumura, Takuya Kusaka, Yasuyuki Nogami:
Analysis of a method to eliminate fruitless cycles for Pollard's rho method with skew Frobenius mapping over a Barreto-Naehrig curve. 160-166 - Hideaki Miyaji, Atsuko Miyaji
Homomorphic commitment scheme with constant output locality. 167-173 - Tatsuma Mori, Taito Manabe, Yuichiro Shibata:
Fast and Memory Efficient Approximated Convex Hull Computation with FPGA. 174-180 - Makoto Nakagami, José A. B. Fortes, Saneyasu Yamaguchi:
Performance Improvement of Hadoop ext4-based Disk I/O. 181-187 - Akifumi Nomasaki, Eitaro Kohno, Yoshiaki Kakuda:
On the Connection-Establishment Request Control Method to Improve Data Packet Delivery Ratio at Densely Populated Areas for Bluetooth MANETs. 188-194 - Manfred Orsztynowicz, Hideharu Amano, Kenichi Kubota, Takaaki Miyajima:
Exploiting temporal parallelism in particle-based incompressive fluid simulation on FPGA. 195-201 - Kanon Sasaki, Kouto Miyazawa, Kohei Ogawa, Saneyasu Yamaguchi:
TCP BBR Performance Improvement on a Network with Increasing RTT. 202-208 - Masaya Sato, Hideo Taniguchi, Ryosuke Nakamura:
Virtual Machine Monitor-based Hiding Method for Access to Debug Registers. 209-214 - Junnosuke Suzuki, Kota Ando, Kazutoshi Hirose, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
ProgressiveNN: Achieving Computational Scalability without Network Alteration by MSB-first Accumulative Computation. 215-220 - Thi Thu Thao Khong, Takashi Nakada, Yasuhiko Nakashima:
Bayes without Bayesian Learning for Resisting Adversarial Attacks. 221-227 - Kaijie Wei
An implementation methodology for Neural Network on a Low-end FPGA Board. 228-234 - Qian Zhao, Motoki Amagasaki, Masahiro Iida, Takaichi Yoshida:
Architecture-aware Cost Function for 3D FPGA Placement Using Convolutional Neural Network. 235-241
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