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Arcel G. Leynes
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2020 – today
- 2023
- [c6]Adam Jefferson Ramones, Paolo Miguel Villacorta, Kyla Marie Juruena, Trixi Emmanuelle Obar, John Robert Siglos, Jean-Marriz Manzano, Zyrel Renzo Sanchez, Arcel G. Leynes, Maria Sophia Ralota, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon:
A 288nV/√Hz low-noise capacitively-coupled instrumentation amplifier (CCIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensors. ISOCC 2023: 267-268 - [c5]Kyla Marie Juruena, Paolo Miguel Villacorta, Trixi Emmanuelle Obar, John Robert Siglos, Adam Jefferson Ramones, Jean-Marriz Manzano, Zyrel Renzo Sanchez, Arcel G. Leynes, Maria Sophia Ralota, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon:
A high CMRR, high input impedance current-feedback instrumentation amplifier (CFIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensors. ISOCC 2023: 269-270 - 2021
- [c4]Arcel G. Leynes, John Richard E. Hizon, Maria Theresa G. de Leon, Marc D. Rosales:
Asymmetric Charge Transfer Scheme Model in ML-SSHC with Consistent Power Extraction Improvement for Piezoelectric Energy Harvesters. ISOCC 2021: 65-66 - [c3]Steven Lorenzo Mindoro, John Owen Cabuyadao, Arcel G. Leynes, Maria Sophia Ralota, Zyrel Renzo Sanchez, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon:
A CMOS Power Management Unit with Undervoltage Lockout Circuit as Startup for Piezoelectric Energy Harvesting Applications. ISOCC 2021: 131-132
2010 – 2019
- 2019
- [j1]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
A 0.5 V Low-Power All-Digital Phase-Locked Loop in 65 nm Complementary Metal-Oxide-Semiconductor Process. J. Low Power Electron. 15(1): 64-75 (2019) - 2018
- [c2]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
Power Optimization of a 0.5V 0.286-to-18MHz ADPLL in 65nm CMOS Process. NGCAS 2018: 70-73 - [c1]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications. TENCON 2018: 2122-2126
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