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Anastacia B. Alvarez
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2020 – today
- 2024
- [c31]Lawrence Roman A. Quizon
, Anastacia B. Alvarez
Federated Learning with MLPerfTiny Tasks and Server-side Momentum. ICMLSC 2024: 32-36 - [c30]Fredrick Angelo R. Galapon, Anastacia B. Alvarez:
A Hyperdimensional Computing Architecture with 4.4x Energy Efficiency in 65nm CMOS. ISCAS 2024: 1-5 - 2023
- [c29]Giussepe Yvanric Galvez, Andrew James Lim, Christopher Jr Camarillo, John Rey Marturillas, Mark Emannuel Teodoro, Ellris Kristian Nuel Urfano, Anastacia B. Alvarez, Ryan Albert G. Antonio, Fredrick Angelo R. Galapon, Sherry Joy Alvionne Baquiran, Allen Jason Tan, Lawrence Roman A. Quizon:
Integration of In-Memory Computing Capabilities to a Self-Matching Complementary-Reference Sensing Scheme for TST-MRAM. ISOCC 2023: 285-286 - [c28]Kim Isaac I. Buelagala, Ginzy S. Javier, Sean Alfred A. Lipardo, James Carlo E. Sorsona, Sherry Joy Alvionne S. Baquiran, Lawrence Roman A. Quizon, Allen Jason Tan, Ryan Albert G. Antonio, Fredrick Angelo R. Galapon, Anastacia B. Alvarez:
Energy-Efficient Sparse Hyperdimensional Computing for Speech Recognition. ISOCC 2023: 321-322 - 2022
- [c27]Ryan Albert G. Antonio, Anastacia B. Alvarez:
Redundancy Pruning for Binary Hyperdimensional Computing Architectures. ISCAS 2022: 2097-2101 - 2021
- [c26]Lawrence Roman A. Quizon
A Voltage-Controlled Magnetic Anisotropy based True Random Number Generator. ISOCC 2021: 159-160 - 2020
- [j5]Anastacia B. Alvarez
Energy-Quality Scalable Memory-Frugal Feature Extraction for Always-On Deep Sub-mW Distributed Vision. IEEE Access 8: 18951-18961 (2020) - [c25]Ian Christian Fernandez, Maria Theresa G. de Leon, Anastacia B. Alvarez, Marc D. Rosales:
An Energy-Efficient Temperature Sensor Using CMOS Thyristor Delay Elements. ICM 2020: 1-4 - [c24]Sean Kane Lloyd M. Quintans, Francesca Bea V. Narcida, Janelle Eira A. Tordesillas, Maria Patricia Rouelli G. Sabino, Anastacia B. Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Christopher G. Santos, Marc D. Rosales:
5 Gb/s Optical Transceiver for MEMS Tunable HCG-VCSEL in 65 nm CMOS. ISOCC 2020: 47-48 - [c23]Renzo Nicolas Alsim, Anastacia Ballesil-Alvarez, Maria Theresa G. de Leon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, Christopher Santos, John Richard E. Hizon:
A Top-Down Approach for Low Noise Amplifier Design using Verilog-A. ISOCC 2020: 81-82 - [c22]Arriel Ting, Anastacia B. Alvarez, Maria Theresa G. de Leon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, John Richard E. Hizon, Christopher Santos:
Designing a Class E Power Amplifier through Modeling in Verilog-A. ISOCC 2020: 93-94 - [c21]Christian Joseph Dia, Ralfael Himor, Anastacia B. Alvarez, John Richard E. Hizon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, Christopher Santos, Maria Theresa G. de Leon:
An Interface for Shock Inputs in Piezoelectric Energy Harvesting using Synchronous Electric Charge Extraction. ISOCC 2020: 103-104 - [c20]Maverick Jonas G. Adonis, Renzo S. Forteza, Alaine Richelle C. Ramos, Anastacia B. Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Maria Patricia Rouelli Sabino-Santos, Christopher G. Santos, Marc D. Rosales:
FPGA-based Features Extraction Sensor for Lettuce Crop. TENCON 2020: 269-273 - [c19]Alexis Czezar Cruz Torreno, Maria Theresa Gusad de Leon, Marc Driz Rosales, Anastacia Ballesil-Alvarez:
Power and Area Oriented Implementations of Lightweight Cryptographic Algorithms for Wireless Sensor Networks. TENCON 2020: 473-477 - [c18]Michael Joseph Neri, Redentor Immanuel Ridao, Victor Emmanuel Baylosis, Phoebe Meira Chua, Allen Jason Tan, Maria Theresa G. de Leon, John Richard E. Hizon, Marc D. Rosales, Maria Patricia Rouelli Sabino-Santos, Christopher Santos, Anastacia B. Alvarez:
Design and Implementation of a Pipelined RV32IMC Processor with Interrupt Support for Large-Scale Wireless Sensor Networks. TENCON 2020: 806-811 - [c17]Ryan Albert G. Antonio, Anastacia B. Alvarez:
Bit-Selection Control for Energy-Efficient Handwritten Digits Recognition Hyperdimensional Computing Architecture. TENCON 2020: 818-823
2010 – 2019
- 2019
- [j4]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
A 0.5 V Low-Power All-Digital Phase-Locked Loop in 65 nm Complementary Metal-Oxide-Semiconductor Process. J. Low Power Electron. 15(1): 64-75 (2019) - [c16]Phoebe Laine Panis, Maria Sophia Ralota, Joenard Matanguihan, Anastacia B. Alvarez, John Richard E. Hizon, Marc D. Rosales, Christopher Santos, Maria Theresa G. de Leon:
Design and Implementation a Self-starting Thermal Energy Harvester with Resonant Startup and Maximum Power Point Tracking Capabilities/or Wireless Sensor Nodes. ISOCC 2019: 95-96 - 2018
- [j3]Sachin Taneja
Fully Synthesizable PUF Featuring Hysteresis and Temperature Compensation for 3.2% Native BER and 1.02 fJ/b in 40 nm. IEEE J. Solid State Circuits 53(10): 2828-2839 (2018) - [c15]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
Power Optimization of a 0.5V 0.286-to-18MHz ADPLL in 65nm CMOS Process. NGCAS 2018: 70-73 - [c14]Gio Ishmael Evidente, Steven Lorenzo Mindoro, Anastacia B. Alvarez, Chris Vincent J. Densing, Rico Jossel M. Maestro, Marc D. Rosales, Maria Theresa G. de Leon:
An Ultra-Low Power Direct Active-RF Detection Wake-Up Receiver with Noise-Cancelling Envelope Detector in 65 nm CMOS Process. TENCON 2018: 12-15 - [c13]George Procyon Cabrera, Jhelsea Credo, Gio Ishmael Evidente, Ralen Rose Gloria Malatbalat, Steven Lorenzo Mindoro, Arlo Ricardo Sanico, Anastacia B. Alvarez, Chris Vincent J. Densing, Rico Jossel M. Maestro, Marc D. Rosales, Maria Theresa G. de Leon:
A 2.4 GHz Energy-efficient Short-range Receiver with Wake-up and Multiple Gain Settings for Wireless Sensor Networks. TENCON 2018: 26-31 - [c12]Abigail Alejandro Antenor, Kristine Delica Campang, Khristen Anne Mendoza Rafols, Anastacia Ballesil-Alvarez, Maria Theresa Gusad de Leon, Chris Vincent Jagunap Densing, Rico Jossel Mindoro Maestro, Marc Driz Rosales:
Design and Implementation of a Thermoelectric Energy Harvesting Interface Circuit with Maximum Power Point Tracking and Self-Startup Capability for Wireless Sensor Nodes. TENCON 2018: 1346-1351 - [c11]Uziel Rein Agub, Jhake Zebedee Aquino, Justine Beano, Rommel Monsayac, Anastacia B. Alvarez, Maria Theresa G. de Leon, Chris Vincent J. Densing, John Richard E. Hizon, Rico Jossel M. Maestro, Marc D. Rosales:
A Study on Coarse Stage Bit Allocation to Improve Power Efficiency of a 10-bit Coarse-Fine SAR ADC Implemented in 65nm CMOS Process for Environmental Sensing Applications. TENCON 2018: 1352-1356 - [c10]Gienel Francheska Delos Santos Manarang, Rusty John Lloyd Rodriguez Mina
Hardware-Based Model of Node Clustering Using Q-Learning for Wireless Sensor Networks. TENCON 2018: 1673-1678 - [c9]Zyrel Renzo Sanchez, Sam Jason Vasquez, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Rico Jossel M. Maestro, Maria Theresa G. de Leon, Marc D. Rosales:
A gm/ID Based Algorithm for the Design of CMOS Miller Operational Amplifiers in 65 nm Technology. TENCON 2018: 1870-1875 - [c8]Fredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro:
A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications. TENCON 2018: 2122-2126 - 2017
- [c7]Anastacia B. Alvarez, Gopalakrishnan Ponnusamy, Massimo Alioto:
EQSCALE: Energy-quality scalable feature extraction engine for Sub-mW real-time video processing with 0.55 mm2 area in 40nm CMOS. A-SSCC 2017: 241-244 - [c6]Sachin Taneja, Anastacia B. Alvarez, Gopalakrishnan Sadagopan, Massimo Alioto:
A fully-synthesizable C-element based PUF featuring temperature variation compensation with native 2.8% BER, 1.02fJ/b at 0.8-1.0V in 40nm. A-SSCC 2017: 301-304 - 2016
- [j2]Anastacia B. Alvarez, Wenfeng Zhao, Massimo Alioto:
Static Physically Unclonable Functions for Secure Chip Identification With 1.9-5.8% Native Bit Instability at 0.6-1 V and 15 fJ/bit in 65 nm. IEEE J. Solid State Circuits 51(3): 763-775 (2016) - 2015
- [j1]Wenfeng Zhao, Anastacia B. Alvarez, Yajun Ha:
A 65-nm 25.1-ns 30.7-fJ Robust Subthreshold Level Shifter With Wide Conversion Range. IEEE Trans. Circuits Syst. II Express Briefs 62-II(7): 671-675 (2015) - [c5]Anastacia B. Alvarez, Wenfeng Zhao, Massimo Alioto:
14.3 15fJ/b static physically unclonable functions for secure chip identification with <2% native bit instability and 140× Inter/Intra PUF hamming distance separation in 65nm. ISSCC 2015: 1-3 - 2013
- [c4]Wenfeng Zhao, Yajun Ha, Chin Hau Hoo, Anastacia B. Alvarez:
Robustness-driven energy-efficient ultra-low voltage standard cell design with intra-cell mixed-Vt methodology. ISLPED 2013: 323-328 - 2011
- [c3]Christiensen D. C. Arandilla, Anastacia B. Alvarez, Christian Raymund K. Roque:
Static Noise Margin of 6T SRAM Cell in 90-nm CMOS. UKSim 2011: 534-539 - 2010
- [c2]Rosario M. Reas, Anastacia B. Alvarez, Joy Alinda P. Reyes:
Simulation of Standard Benchmarks in Hardware Implementations of L2 Cache Models in Verilog HDL. UKSim 2010: 153-158 - [c1]Jestoni V. Zarsuela, Anastacia B. Alvarez, Joy Alinda Reyes:
A Simulation of Cache Sub-banking and Block Buffering as Power Reduction Techniques for Multiprocessor Cache Design. UKSim 2010: 515-520
Coauthor Index
aka: Chris Vincent Jagunap Densing
aka: Maria Theresa Gusad de Leon
aka: Rico Jossel Mindoro Maestro
aka: Marc Driz Rosales
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