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Yongwoo Jo
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2020 – today
- 2024
- [j6]Juyeop Kim
, Yongwoo Jo
A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation. IEEE J. Solid State Circuits 59(2): 424-434 (2024) - [c10]Yuhwan Shin, Junseok Lee, Juyeop Kim, Yongwoo Jo, Jaehyouk Choi:
10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication Technique. ISSCC 2024: 196-198 - 2023
- [j5]Yongwoo Jo
A Wideband LO Generator for 5G FR1 Bands Using a Single LC-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier. IEEE J. Solid State Circuits 58(12): 3338-3350 (2023) - [c9]Yongwoo Jo
A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier. ISSCC 2023: 76-77 - [c8]Yuhwan Shin, Yongwoo Jo
A 900µW, 1-4GHz Input-Jitter-Filtering Digital-PLL-Based 25%-Duty-Cycle Quadrature-Clock Generator for Ultra-Low-Power Clock Distribution in High-Speed DRAM Interfaces. ISSCC 2023: 408-409 - 2022
- [j4]Younghyun Lim
A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop. IEEE J. Solid State Circuits 57(2): 480-491 (2022) - 2021
- [c7]Juyeop Kim
32.4 A 104fsrms-Jitter and -61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique. ISSCC 2021: 448-450 - 2020
- [c6]Younghyun Lim
17.8 A 170MHz-Lock-In-Range and -253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator. ISSCC 2020: 280-282
2010 – 2019
- 2019
- [j3]Seojin Choi
An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114. IEEE J. Solid State Circuits 54(4): 927-936 (2019) - [c5]Jungyu Kang, Yongwoo Jo, Dongjin Lee, Seung-Jun Han, Kyoungwook Min, Jeongdan Choi:
Real-time road surface marking detection from a bird's-eye view image using convolutional neural networks. ICMV 2019: 1143327 - 2018
- [j2]Younghyun Lim
An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique. IEEE J. Solid State Circuits 53(9): 2675-2685 (2018) - [c4]Dongjin Lee, Yongwoo Jo, Seung-Jun Han, Jungyu Kang, Kyoungwook Min, Jeongdan Choi, Cheong Hee Park:
Vehicle re-identification for a parking lot toll system using convolutional neural networks. ICMV 2018: 110412K - [c3]Yongwoo Jo, Seung-Jun Han, Dongjin Lee, Kyoungwook Min, Jeongdan Choi:
An autonomous lane-level road map building using low-cost sensors. ICMV 2018: 1104129 - [c2]Seung-Jun Han, Jungyu Kang, Yongwoo Jo, Dongjin Lee, JeongDan Choi:
Robust Ego-motion Estimation and Map Matching Technique for Autonomous Vehicle Localization with High Definition Digital Map. ICTC 2018: 630-635 - [c1]Seojin Choi, Seyeon Yoo, Yongsun Lee, Yongwoo Jo
153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier. VLSI Circuits 2018: 185-186 - 2015
- [j1]Kichun Jo
Precise Localization of an Autonomous Car Based on Probabilistic Noise Models of Road Surface Marker Features Using Multiple Cameras. IEEE Trans. Intell. Transp. Syst. 16(6): 3377-3392 (2015)
Coauthor Index
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