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Sébastien Haendler
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2020 – today
- 2021
- [c14]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sébastien Haendler, Arnaud Régnier, Stephan Niel:
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology. DTIS 2021: 1-5
2010 – 2019
- 2019
- [c13]Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber:
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications. ESSCIRC 2019: 7-10 - [c12]Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber:
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications. ESSDERC 2019: 7-10 - 2018
- [c11]Rania Lajmi, Florian Cacho, O. David, Jean-Pierre Blanc, Emmanuel Rouat, Sébastien Haendler, Ph. Benech, Estelle Lauga-Larroze, Sylvain Bourdel:
Reliability assessment of 4GSP/s interleaved SAR ADC. IRPS 2018: 5-1 - 2017
- [c10]Marcelino Seif, Fabien Pascal, Bruno Sagnes, J. Elbeyrouthy, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria:
Characterization, modeling and comparison of 1/f noise in Si/SiGe: C HBTs issued from three advanced BiCMOS technologies. ICM 2017: 1-4 - 2016
- [c9]Rossella Ranica, Nicolas Planes, Vincent Huard, Olivier Weber, Daniel Noblet, Damien Croain, Fabien Giner, Sylvie Naudet, P. Mergault, S. Ibars, A. Villaret, Maryline Parra, Sébastien Haendler, M. Quoirin, Florian Cacho, C. Julien, F. Terrier, Lorenzo Ciampolini, David Turgis, Christophe Lecocq, Franck Arnaud:
28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications. VLSI Circuits 2016: 1-2 - 2015
- [c8]Christoforos G. Theodorou, Eleftherios G. Ioannidis, Sébastien Haendler, Nicolas Planes, Emmanuel Josse, Charalambos A. Dimitriadis, Gérard Ghibaudo:
New LFN and RTN analysis methodology in 28 and 14nm FD-SOI MOSFETs. IRPS 2015: 1 - 2014
- [j3]Marcelino Seif, Fabien Pascal, Bruno Sagnes, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria:
Dispersion study of DC and Low Frequency Noise in SiGe: C Heterojunction Bipolar Transistors used for mm-Wave to Terahertz applications. Microelectron. Reliab. 54(9-10): 2171-2175 (2014) - [c7]Eleftherios G. Ioannidis, Sébastien Haendler, Christoforos G. Theodorou, Nicolas Planes, Charalabos A. Dimitriadis, Gérard Ghibaudo:
Statistical analysis of dynamic variability in 28nm FD-SOI MOSFETs. ESSDERC 2014: 214-217 - [c6]Marcelino Seif, Fabien Pascal, Bruno Sagnes, Alain Hoffmann, Sébastien Haendler, Pascal Chevalier, Daniel Gloria:
Study of low frequency noise in advanced SiGe: C heterojunction bipolar transistors. ESSDERC 2014: 373-376 - 2013
- [c5]Vivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy:
Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control. ESSCIRC 2013: 415-418 - [c4]Vivek Asthana, Malathi Kar, Jean Jimenez, Sébastien Haendler, Philippe Galy:
6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology. ICICDT 2013: 89-92 - 2012
- [c3]Christoforos G. Theodorou, Eleftherios G. Ioannidis, Sébastien Haendler, Nicolas Planes, Franck Arnaud, Jalal Jomaah, Charalambos A. Dimitriadis, Gérard Ghibaudo:
Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs. ESSDERC 2012: 334-337
2000 – 2009
- 2009
- [c2]Claire Fenouillet-Béranger, P. Perreau, S. Denorme, L. Tosti, François Andrieu, Olivier Weber, S. Barnola, C. Arvet, Y. Campidelli, Sébastien Haendler, R. Beneyton, C. Perrot, C. de Buttet, P. Gros, Loan Pham-Nguyen, F. Leverd, P. Gouraud, F. Abbate, F. Baron, A. Torres, C. Laviron, L. Pinzelli, J. Vetier, C. Borowiak, A. Margain, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Olivier Faynot, Thomas Skotnicki:
Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below. ESSCIRC 2009: 88-91 - 2003
- [j2]François Dieudonné, Sébastien Haendler, Jalal Jomaah, Francis Balestra:
Low frequency noise in 0.12 mum partially and fully depleted SOI technology. Microelectron. Reliab. 43(2): 243-248 (2003) - 2001
- [j1]Sébastien Haendler, Jalal Jomaah, Gérard Ghibaudo, Francis Balestra:
Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors. Microelectron. Reliab. 41(6): 855-860 (2001) - 2000
- [c1]O. Rozeau, Sébastien Haendler, Jalal Jomaah, J. Boussey, Francis Balestra, C. Raynaud, J. L. Pelloie:
0.25 μm SOI technologies performance for low-power radio-frequency applications. ICECS 2000: 45-48
Coauthor Index
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