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M. Sultan M. Siddiqui
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2020 – today
- 2021
- [j2]M. Sultan M. Siddiqui
, Zhao Chuan Lee, Tony Tae-Hyoung Kim
A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1707-1719 (2021)
2010 – 2019
- 2019
- [j1]Zhao Chuan Lee, M. Sultan M. Siddiqui
An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI. IEEE J. Solid State Circuits 54(7): 2091-2101 (2019) - [c7]M. Sultan M. Siddiqui, Sudhir Kumar Sharma, Saurabh Porwal, Khatik Bhagvan Pannalal, Sudhir Kumar:
A 10T SRAM Cell with Enhanced Read Sensing Margin and Weak NMOS Keeper for Large Signal Sensing to Improve VDDMIN. ISCAS 2019: 1-5 - 2018
- [c6]M. Sultan M. Siddiqui, Ruchi Sharma, Van Loi Le
A Radiation Hardened SRAM with Self-refresh and Compact Error Correction. ISOCC 2018: 235-236 - [c5]M. Sultan M. Siddiqui, Sumit Srivastav, Dattatray Ramrao Wanjul, Manankumar Suthar, Sudhir Kumar:
A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance. VLSID 2018: 266-270 - 2017
- [c4]M. Sultan M. Siddiqui, Zhao Chuan Lee, Tony Tae-Hyoung Kim:
A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI. A-SSCC 2017: 165-168 - 2016
- [c3]Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi-Hui Kong, Tony Tae-Hyoung Kim:
An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI. ESSCIRC 2016: 437-440 - 2015
- [c2]M. Sultan M. Siddiqui, Shailendra Sharad, Yogendra Sharma, Amit Khanuja:
Two Phase Write Scheme to Improve Low Voltage Write-ability in Medium-Density SRAMs. VLSID 2015: 176-180 - 2010
- [c1]M. Sultan M. Siddiqui, Basabi Bhaumik:
Reaction-diffusion based model to develop binocular simple cells in visual cortex along with cortical maps. IJCNN 2010: 1-8
Coauthor Index
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