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Nachiket V. Desai
Person information
- affiliation: Intel Labs, Hillsboro, OR, USA
- affiliation (PhD 2017): Massachusetts Institute of Technology, Cambridge, USA
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2020 – today
- 2024
- [j8]Zhaoqing Wang
, Mao Li
A Ten-Level Series-Capacitor 24-to-1-V DC-DC Converter With Fast In Situ Efficiency Tracking, Power-FET Code Roaming, and Switch Node Power Rail. IEEE J. Solid State Circuits 59(7): 2029-2041 (2024) - [c20]Samuel James Bader, Ahmad Zubair, Alvaro Latorre-Rey, Mikkel Hansen, Soumen Sarkar, Abdul Asif, Dimitri Frolov, Kaushik Narayanan, Jag Rangaswamy, Puneet Kanwar Kaur, Sanjeev Kumar, Nirmal Kundu, Shreyas Samraksh Jayaprakash, Abhijeet Khobragade, Yashwanth Pathivada, Qiang Yu, Jagannathan Vasudevan, Ibukun Momson, Said Rami, Heli Vora, Marko Radosavljevic, Pratik Koirala, Michael Beumer, Andrey Vyatskikh, Paul Nordeen, Thomas Hoff, Nachiket V. Desai, Han Wui Then:
Design kit development on a 300mm GaN-on-Si demonstration platform with integrated Si pMOS. BCICTS 2024: 5-8 - [c19]Suhwan Kim, Harish K. Krishnamurthy, Zakir Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De:
14.9 A Monolithic 10.5W/mm2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS. ISSCC 2024: 270-272 - 2023
- [c18]Xi Chen, Aly Shoukry, Tianyu Jia, Xin Zhang
A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking. CICC 2023: 1-2 - [c17]Zhaoqing Wang, Mao Li
93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code Roaming. ESSCIRC 2023: 437-440 - [c16]Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang
Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j7]Nachiket V. Desai
A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors. IEEE J. Solid State Circuits 57(4): 1090-1099 (2022) - [c15]Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir Ahmed, Nachiket V. Desai, Nicolas Butzen, James W. Tschanz, Vivek De:
A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer. ISSCC 2022: 478-480 - [c14]Nachiket V. Desai, Harish K. Krishnamurthy, Suhwan Kim, Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Krishnan Ravichandran, James W. Tschanz, Vivek De:
Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation. VLSI Technology and Circuits 2022: 192-193 - 2021
- [c13]Nachiket V. Desai, Harish K. Krishnamurthy, Khondker Zakir Ahmed, Sheldon Weng, Suhwan Kim, Xiaosen Liu, Huong Do, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De:
Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing. ISSCC 2021: 262-264 - [c12]Khondker Zakir Ahmed, Nachiket V. Desai, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction. VLSI Circuits 2021: 1-2 - [c11]Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors. VLSI Circuits 2021: 1-2 - 2020
- [c10]Harish K. Krishnamurthy, Khondker Zakir Ahmed, Xiaosen Liu, Nachiket V. Desai, Suhwan Kim, Nicolas Butzen, Sally Amin, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De:
Digital Control of Switching and Linear Integrated Voltage Regulators. CICC 2020: 1-4 - [c9]Zakir Zakir Ahmed, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Christopher Schaef, Nachiket V. Desai, Krishnan Ravichandran, James W. Tschanz, Vivek De:
An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j6]Christopher Schaef
A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors. IEEE J. Solid State Circuits 54(12): 3316-3325 (2019) - [c8]Christopher Schaef, Nachiket V. Desai, Harish Krishnamurthy, Sheldon Weng, Huong Do, William J. Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation. ISSCC 2019: 154-156 - 2018
- [j5]Harish Kumar Krishnamurthy
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS. IEEE J. Solid State Circuits 53(1): 8-19 (2018) - [j4]Nachiket V. Desai
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation. IEEE J. Solid State Circuits 53(1): 236-246 (2018) - [j3]Harish Kumar Krishnamurthy
A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS. IEEE J. Solid State Circuits 53(4): 1038-1048 (2018) - [c7]Ujwal Radhakrishna
A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion. CICC 2018: 1-4 - 2017
- [b1]Nachiket Venkappayya Desai:
Circuits for efficient and secure power delivery in distributed applications. Massachusetts Institute of Technology, Cambridge, USA, 2017 - [c6]Preet Garcha, Dina El-Damak
A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting. ESSCIRC 2017: 127-130 - [c5]Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak
21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation. ISSCC 2017: 366-367 - 2016
- [c4]Nachiket V. Desai, Anantha P. Chandrakasan:
A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging. ESSCIRC 2016: 313-316 - 2014
- [j2]Nachiket V. Desai, Jerald Yoo
A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication. IEEE J. Solid State Circuits 49(9): 1995-2004 (2014) - [c3]Nachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan:
A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting. ISLPED 2014: 221-226 - 2013
- [c2]Nachiket V. Desai, Jerald Yoo
A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication. ISSCC 2013: 206-207 - 2012
- [j1]Vijaya Sankara Rao Pasupureddi, Nachiket V. Desai, Pradip Mandal:
A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination. Circuits Syst. Signal Process. 31(1): 31-49 (2012)
2000 – 2009
- 2009
- [c1]Nachiket V. Desai, Aritra Chatterjee, Shaunak Mishra, Dhaval Chudasama, Sunav Choudhary
A Fuzzy Logic Based Approach to De-Weather Fog-Degraded Images. CGIV 2009: 383-387
Coauthor Index
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