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Shivam Priyadarshi
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2020 – today
- 2020
- [j5]Joao Pedro Cerqueira
, Thomas J. Repetti
Catena: A Near-Threshold, Sub-0.4-mW, 16-Core Programmable Spatial Array Accelerator for the Ultralow-Power Mobile and Embedded Internet of Things. IEEE J. Solid State Circuits 55(8): 2270-2284 (2020)
2010 – 2019
- 2019
- [c7]Joao Pedro Cerqueira, Thomas J. Repetti, Yu Pu, Shivam Priyadarshi, Martha A. Kim, Mingoo Seok:
Catena: A 0.5-V Sub-0.4-mW 16-Core Spatial Array Accelerator for Mobile and Embedded Computing. VLSI Circuits 2019: 54- - 2014
- [c6]Shivam Priyadarshi, W. Rhett Davis
Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC. ICICDT 2014: 1-6 - 2013
- [c5]Paul D. Franzon
Exploring early design tradeoffs in 3DIC. ISCAS 2013: 545-549 - [c4]Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis
Hetero2 3D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors. ISQED 2013: 1-7 - 2012
- [j4]Shivam Priyadarshi, T. Robert Harris, Samson Melamed
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. IET Circuits Devices Syst. 6(1): 35-44 (2012) - [j3]Samson Melamed
Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(5): 676-689 (2012) - [j2]Shivam Priyadarshi, Christopher S. Saunders, Nikhil Kriplani, Harun Demircioglu, W. Rhett Davis
Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1522-1535 (2012) - 2011
- [j1]Daniel Schinke, Shivam Priyadarshi, W. Shepherd Pitts, Neil Di Spigna, Paul D. Franzon
SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation. IET Circuits Devices Syst. 5(6): 477-483 (2011) - [c3]Paul D. Franzon
Coordinating 3D designs: Interface IP, standards or free form? 3DIC 2011: 1-3 - [c2]Shivam Priyadarshi, Jianchen Hu, Won Ha Choi, Samson Melamed
Pathfinder 3D: A flow for system-level design space exploration. 3DIC 2011: 1-8 - 2010
- [c1]Shivam Priyadarshi, Nikhil Kriplani, Michael B. Steer, T. Robert Harris:
Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells. BMAS 2010: 75-80
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