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ISLPED 2014: La Jolla, CA, USA
- Yuan Xie, Tanay Karnik, Muhammad M. Khellah, Renu Mehra:
International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014. ACM 2014, ISBN 978-1-4503-2975-0
Keynote address
- Karim Arabi:
Low power design techniques in mobile processes. 1-2
Photonics, spintronics, approximate computing and front-end throttling
- Yigit Demir, Nikos Hardavellas
:
EcoLaser: an adaptive laser control for energy-efficient on-chip photonic interconnects. 3-8 - Botang Shao, Peng Li:
A model for array-based approximate arithmetic computing with application to multiplier and squarer design. 9-14 - Shankar Ganesh Ramasubramanian
SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing. 15-20 - Wei Zhang, Hang Zhang, John C. Lach:
Adaptive front-end throttling for superscalar processors. 21-26
Approximate computing and quality driven power-aware system design
- Swagath Venkataramani, Ashish Ranjan
AxNN: energy-efficient neuromorphic systems using approximate computing. 27-32 - Daniel Palomino
TONE: adaptive temperature optimization for the next generation video encoders. 33-38 - Vinay K. Chippa, Swagath Venkataramani, Kaushik Roy, Anand Raghunathan
StoRM: a stochastic recognition and mining processor. 39-44 - Daniele Bortolotti
Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor. 45-50
Emerging technologies
- Borislav Alexandrov, Khondker Z. Ahmed, Saibal Mukhopadhyay:
An on-chip autonomous thermoelectric energy management system for energy-efficient active cooling. 51-56 - Huichu Liu, Mahsa Shoaran
Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition. 57-62 - Sou-Chi Chang, Ahmet Ceyhan, Vachan Kumar, Azad Naeemi
Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuits. 63-68
Energy-efficient systems using emerging non-volatile memory technologies
- Ping Chi, Wang-Chien Lee, Yuan Xie:
Making B+-tree efficient in PCM-based main memory. 69-74 - Chenchen Fu, Mengying Zhao, Chun Jason Xue
Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. 75-80 - Kan Zhong, Xiao Zhu, Tianzheng Wang, Dan Zhang, Xianlu Luo, Duo Liu, Weichen Liu
DR. Swap: energy-efficient paging for smartphones. 81-86
Clock and IO circuit techniques
- Visvesh S. Sathe:
Quasi-resonant clocking: a run-time control approach for true voltage-frequency-scalability. 87-92 - Dongjun Xu, Sai Manoj Pudukotai Dinakarrao
An energy-efficient 2.5D through-silicon interposer I/O with self-adaptive adjustment of output-voltage swing. 93-98 - Seongjong Kim, Mingoo Seok:
Reconfigurable regenerator-based interconnect design for ultra-dynamic-voltage-scaling systems. 99-104
Thermal-aware design: from device to system
- Woojoo Lee, Yanzhi Wang, Tiansong Cui, Shahin Nazarian, Massoud Pedram:
Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon. 105-110 - Chung-Wei Lin, Tzu-Hsuan Hsu, Xin-Wei Shih, Yao-Wen Chang
Buffered clock tree synthesis considering self-heating effects. 111-116 - Qing Xie, Mohammad Javad Dousti, Massoud Pedram:
Therminator: a thermal simulator for smartphones producing accurate chip and skin temperature maps. 117-122
Industry special session
- Amr Fahim:
Challenges in low-power analog circuit design for sub-28nm CMOS technologies. 123-126 - Philippe Flatresse:
Process and design solutions for exploiting FD-SOI technology towards energy efficient SOCs. 127-130 - Kangho Lee, Jimmy J. Kan, Seung-Hyuk Kang:
Unified embedded non-volatile memory for emerging mobile markets. 131-136
Embedded tutorial
- Rick Koster, Sushma Honnavara Prasad, Shreedhar Ramachandra:
Failing to fail: achieving success in advanced low power design using UPF. 137-138
Keynote address
- Jason Cong:
Accelerator-rich architectures: from single-chip to datacenters. 139-140
GPU voltage noise, uncore power modeling, memory power management, and testing
- Jingwen Leng, Yazhou Zu, Minsoo Rhu, Meeta Sharma Gupta, Vijay Janapa Reddi:
GPUVolt: modeling and characterizing voltage noise in GPU architectures. 141-146 - Hans M. Jacobson, Arun Joseph, Dharmesh Parikh, Pradip Bose, Alper Buyuktosunoglu:
Empirically derived abstractions in uncore power modeling for a server-class processor chip. 147-152 - Felipe Martin Sampaio, Muhammad Shafique
Content-driven memory pressure balancing and video memory power management for parallel high efficiency video coding. 153-158 - John Sartori, Rakesh Kumar:
Software canaries: software-based path delay fault testing for variation-aware energy-efficient design. 159-164
CAD for low power and reliability
- Hao He, Gongming Yang, Jiang Hu:
Algorithms for power-efficient QoS in application specific NoCs. 165-170 - Shreepad A. Panth, Kambiz Samadi, Yang Du, Sung Kyu Lim
Design and CAD methodologies for low power gate-level monolithic 3D ICs. 171-176 - Reef Eilers, Malte Metzdorf, Domenik Helms, Wolfgang Nebel:
Efficient NBTI modeling technique considering recovery effects. 177-182 - Ruchir Puri, Mihir R. Choudhury, Haifeng Qian
Bridging high performance and low power in processor design. 183-188
Energy eefficient digital circuit techniques
- Gai Liu, Ye Tao, Mingxing Tan, Zhiru Zhang
CASA: correlation-aware speculative adders. 189-194 - Seyedhamidreza Motaman, Anirudh Iyengar, Swaroop Ghosh:
Synergistic circuit and system design for energy-efficient and robust domain wall caches. 195-200 - Behnam Sedighi, N. Prasanth Anthapadmanabhan, Dusan Suvakovic:
Timing errors in LDPC decoding computations with overscaled supply voltage. 201-206
Optimizing computation and communication in mobile systems
- Pilsoon Choi, Jason H. Gao, Nadesh Ramanathan, Mengda Mao, Shipeng Xu, Chirn Chye Boon
A case for leveraging 802.11p for direct phone-to-phone communications. 207-212 - John Redmond:
Leakage mitigation techniques in smartphone SoCs. 213-214
Voltage reference and power converter circuits
- Oscar E. Mattia, Hamilton Klimach, Sergio Bampi
2.3 ppm/°c 40 nW MOSFET-only voltage reference. 215-220 - Nachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan:
A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting. 221-226 - Monodeep Kar, Sergio Carlo, Harish Kumar Krishnamurthy, Saibal Mukhopadhyay:
Impact of process variation in inductive integrated voltage regulator on delay and power of digital circuits. 227-232
Variation and reliability consideration for low-power systems
- Jaemin Kim, Alma Pröbstl, Samarjit Chakraborty
Aging mitigation of power supply-connected batteries. 233-238 - Vivek Joy Kozhikkottu, Swagath Venkataramani, Sujit Dey, Anand Raghunathan
Variation tolerant design of a vector processor for recognition, mining and synthesis. 239-244 - Reza Azimi, Xin Zhan, Sherief Reda:
Thermal-aware layout planning for heterogeneous datacenters. 245-250
Poster session
- Wonjun Lee, Channoh Kim, Houp Song, Jae W. Lee:
QPR.js: a runtime framework for QoS-aware power optimization for parallel JavaScript programs. 251-254 - Yin-Nien Chen, Ming-Long Fan, Vita Pi-Ho Hu
Ultra-low voltage mixed TFET-MOSFET 8T SRAM cell. 255-258 - Trang Le Dinh Dang
a-SAD: power efficient SAD calculator for real time H.264 video encoder using MSB-approximation technique. 259-262 - Zhenyu Sun, Xiuyuan Bi, Alex K. Jones
Design exploration of racetrack lower-level caches. 263-266 - Donghwa Shin, Alessandro Sassone, Alberto Bocca, Alberto Macii
A compact macromodel for the charge phase of a battery with typical charging protocol. 267-270 - Digvijay Singh, William J. Kaiser:
Energy efficient task scheduling on a multi-core platform using real-time energy measurements. 271-274 - Mohammad Khavari Tavana
Energy-efficient mapping of biomedical applications on domain-specific accelerator under process variation. 275-278 - Joseph Pusdesris, Benjamin VanderSloot, Trevor N. Mudge:
A memory rename table to reduce energy and improve performance. 279-282 - Kannan A. Sankaragomathi, William Anthony Smith, Brian P. Otis, Visvesh S. Sathe:
A deterministic-dither-based, all-digital system for on-chippower supply noise measurement. 283-286 - Sara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino:
An open-source framework for formal specification and simulation of electrical energy systems. 287-290 - Seongjong Kim, Mingoo Seok:
Analysis and optimization of in-situ error detection techniques in ultra-low-voltage pipeline. 291-294 - Francesco Fraternali, Andrea Bartolini
Quantifying the impact of variability on the energy efficiency for a next-generation ultra-green supercomputer. 295-298 - Majed Valad Beigi, Gokhan Memik:
MIN: a power efficient mechanism to mitigate the impact of process variations on nanophotonic networks. 299-302 - Hsiang-Yun Cheng
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. 303-306 - Peter Beshay, Vikas Chandra, Rob Aitken, Benton H. Calhoun:
A digital dynamic write margin sensor for low power read/write operations in 28nm SRAM. 307-310 - Siyu Yue, Lizhong Chen, Di Zhu, Timothy Mark Pinkston, Massoud Pedram:
Smart butterfly: reducing static power dissipation of network-on-chip with core-state-awareness. 311-314 - Ihab Nahlus, Eric P. Kim, Naresh R. Shanbhag, David T. Blaauw:
Energy-efficient dot product computation using a switched analog circuit architecture. 315-318 - Tiantao Lu, Ankur Srivastava
Gated low-power clock tree synthesis for 3D-ICs. 319-322 - Caleb Serafy, Ankur Srivastava
Unlocking the true potential of 3D CPUs with micro-fluidic cooling. 323-326 - Hoda Aghaei Khouzani
Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocation. 327-330
Keynote address
- Parthasarathy Ranganathan:
The new (system) balance of power and opportunities for optimizations. 331-332
Energy efficient cache and memory design
- Kyungsang Cho, Yongjun Lee, Young H. Oh, Gyoo-Cheol Hwang, Jae W. Lee:
eDRAM-based tiered-reliability memory with applications to low-power frame buffers. 333-338 - Jue Wang, Xiangyu Dong, Yuan Xie:
Enabling high-performance LPDDRx-compatible MRAM. 339-344 - Chao Zhang, Guangyu Sun, Peng Li
SBAC: a statistics based cache bypassing method for asymmetric-access caches. 345-350 - Zhong Zheng, Zhiying Wang, Mikko H. Lipasti:
Tag check elision. 351-356
Energy harvesting and energy-aware system design
- Jaemin Kim, Yanzhi Wang, Massoud Pedram, Naehyuck Chang:
Fast photovoltaic array reconfiguration for partial solar powered vehicles. 357-362 - Sehwan Kim, Minseok Lee, Pai H. Chou:
Energy harvesting from anti-corrosion power sources. 363-368 - Yongbing Huang, Mingyu Chen, Lixin Zhang, Shihai Xiao, Junfeng Zhao, Zhulin Wei:
Intelligent frame refresh for energy-aware display subsystems in mobile devices. 369-374 - Hrishikesh Jayakumar
Powering the internet of things. 375-380
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