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1st DELTA 2002: Christchurch, New Zealand
- 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand. IEEE Computer Society 2002, ISBN 0-7695-1453-7
Analog Test
- Mike W. T. Wong, K. Y. Ko, Yim-Shu Lee:
Analog and Mixed-Signal IP Cores Testing. 3-7 - Hans G. Kerkhoff, Arun A. Joseph, Sander Heuvelmans:
Testable Design and Testing of High-Speed Superconductor Microelectronics. 8-12 - Zhen Guo, Jacob Savir:
Observer-Based Test of Analog Linear Time-Invariant Circuits. 13-17 - Gloria Huertas, Diego Vázquez, Adoración Rueda
, José L. Huertas:
Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. 18-24 - Soumendu Bhattacharya, Abhijit Chatterjee:
Constrained Specification-Based Test Stimulus Generation for Analog Circuits Using Nonlinear Performance Prediction Models. 25-32
Communications
- Ruly Lai-U Choi, Ross D. Murch
MIMO Transmit Optimization for Wireless Communication Systems. 33-37 - Tharek Abdul Rahman, Toh Chee Leng:
Adaptive Power Control Design for Microwave Communication System. 38-42 - Salim Ouadjaout, Marie-France Albenge, Dominique Houzet:
VSIA Interface Cosynthesis. 43-46 - Jamil Y. Khan
Bluetooth-Based Wireless Personal Area Network for Multimedia Communication. 47-51 - Florent Carlier, Fabienne Nouvel, Jacques Citerne:
Multi-User Detection for CDMA Communications Based on Self Organized Neural Networks Structures. 52-58
Digital Signal Processing and Architectures
- J. Geoffrey Chase, Christopher G. Pretty, Alex Bedarida, Philippe Bettler:
An Applications-Based Approach to Measuring DSP Efficiency. 59-62 - Christopher G. Pretty, J. Geoffrey Chase:
Reconfigurable DSP's for Efficient MPEG-4 Video and Audio Decoding. 63-67 - Peter J. Green, Desmond P. Taylor:
Smart Antenna Software Radio Test System. 68-72 - Victor Varshavsky, Vyacheslav Marakhovsky:
GALA Approach in Design of Asynchronous Control for Counterflow Pipeline Processor. 73-80
From Low to High Level Fault Simulation and Diagnosis
- Dominique Federici, Paul Bisgambiglia, Jean François Santucci:
Behavioral Fault Simulation: Implementation and Experiments Results. 81-85 - Raimund Ubar, Jaan Raik
Multi-Level Fault Simulation of Digital Systems on Decision Diagrams. 86-91 - Kazuya Shimizu, Masaya Takamura, Takanori Shirai, Noriyoshi Itazaki, Kozo Kinoshita:
Fault Simulation Method for Crosstalk Faults in Clock-Delayed Domino CMOS Circuits. 92-98
High Level Design
- Haifeng Zhou, Zhenghui Lin, Wei Cao:
Research on VHDL RTL Synthesis System. 99-103 - Amjad Hajjar, Tom Chen:
An Accurate Coverage Forecasting Model for Behavioral Model Verification. 104-110 - Chie Dou, Shing-Jeh Jiang, Kuo-Cheng Leu:
A Novel CAM/RAM Based Buffer Manager for Next Generation IP Routers. 111-115 - Ilkka Saastamoinen, David A. Sigüenza-Tortosa, Jari Nurmi
Interconnect IP Node for Future System-on-Chip Designs. 116-122
Memory
- Jörg E. Vollrath:
Signal Margin Analysis for Memory Sense Amplifiers . 123-127 - Ad J. van de Goor, Ivo Schanstra:
Address and Data Scrambling: Causes and Impact on Memory Tests. 128-136 - Jen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu
Flash Memory Built-In Self-Test Using March-Like Algorithm. 137-141 - Atsumu Iseno, Yukihiro Iguchi:
A Method for Storing Fail Bit Maps in Burn-in Memory Testers. 142-148
Power Issues in Design and Test
- Phillip E. Pascoe, Harsha R. Sirisena, Adnan H. Anbuky
Coup De Fouet Based VRLA Battery Capacity Estimation. 149-153 - Chandramouli Gopalakrishnan, Srinivas Katkoori
Power Optimization of Combinational Circuits by Input Transformations. 154-158 - Ranganathan Sankaralingam, Nur A. Touba:
Reducing Test Power During Test Using Programmable Scan Chain Disable. 159-166
Sensor and Analog Design
- Meng-Lieh Sheu, Tai-Ping Sun, Far-Wen Jih:
Test Socket Chip for Measuring Dark Current in IR FPA. 167-171 - Chih-Wen Lu, Chung-Len Lee:
A Low Power High Speed Class-B Buffer Amplifier for Flat Panel Display Application. 172-176 - Wen-Yaw Chung, Mao-Hsiang Yeh, Jia-Chyi Chen, Shen-Kan Hsiung, Dorota G. Pijanowska
Design of a Low-voltage Instrumentation Amplifier for Enzyme-Extended-Gate Field Effect Transistor Based Urea Sensor Application. 177-180 - Ranjit Singh, Low Lee Ngo, Ho Soon Seng, Frederick Neo Chwee Mok:
A Silicon Piezoresistive Pressure Sensor. 181-186
Special Session on Education
- César A. Piña:
Evolution Of The Mosis VLSI Educational Program. 187-191 - David V. Kerns Jr., Sherra E. Kerns, Gill A. Pratt, Mark H. Somerville, Jill D. Crisman:
The Search for Design in Electrical Engineering Education. 192-196 - R. M. Hodgson:
The Development and Transfer of Advanced Technology from Universities to Industry. 197-202 - Ton J. Mouthaan, R. W. Brink, Henk Vos:
Competencies of BSc and MSc Programmes in Electrical Engineering and Student Portfolios. 203-208 - Dale A. Carnegie:
Electronics Education: A Systems Based Mechatronic Approach. 209-213 - Andrzej Rucinski, Barbara Dziurla-Rucinska:
Boundary Scan as a Test Solution in Microelectronics Curricula. 214-218 - Wayne Moorhead, Serge N. Demidenko
Making ATE Accessible for Academic Institutions. 219-222 - Richard J. Blaikie
Teaching Integrated Circuit and Semiconductor Device Design in New Zealand: The University of Canterbury Approach. 223-229 - Yves Bertrand, Marie-Lise Flottes, Florence Azaïs, Serge Bernard
European Network for Test Education. 230-234 - Yao Li
PARTOS-11: an Efficient Real-Time Operating System for Low-Cost Microcontrollers. 235-239 - Murray Pearson, Dean Armstrong, Tony McGregor:
Design of a Processor to Support the Teaching of Computer Systems. 240-244 - John L. Bähr:
Applied Science (Electronics) at the University of Otago. 245-249 - Roger F. Browne, Serge N. Demidenko
Harnessing Geographically Distributed Cooperation in Microtechnology Course at Massey University. 250-256
Special Session on Electromagnetics and Control
- William Chen, Simon D. Round, Richard Duke:
Design of an Auxiliary Power Distribution Network for an Electric Vehicle. 257-261 - Ibrahim H. Al-Bahadly:
Analysis of Position Estimation Method for Switched Reluctance Drives. 262-266 - István Vajda:
Conceptual Design of an All Superconducting Mini Power Plant Model. 267-271 - Hans Hauser, Paul L. Fulmek, Felix A. Himmelstoss, Thomas M. Wolbank, Reinhard Wöhrnschimmel, Peter R. Wurm:
Magnetic Hysteresis Modeling of Electronic Components. 272-279 - David Parker:
Computer Based Real-Time Simulator for Renewable Energy Converters. 280-286
Special Session on FPGA
- Parag K. Lala, K. K. Bondali:
On Biologically-Inspired Design of Fault-Tolerant Digital Systems. 287-290 - Anna Antola, Mariagiovanna Sami, Vincenzo Piuri:
On-line Diagnosis and Reconfiguration of FPGA Systems. 291-296 - Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian:
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. 297-301 - Monica Alderighi
A Fault-Tolerant FPGA-based Multi-Stage Interconnection Network for Space Applications. 302-308
Special Session on Image Processing
- Jörg Velten, Anton Kummert:
FPGA-Based Implementation of Variable Sized Structuring Elements for 2D Binary Morphological Operations. 309-312 - Marco Krips, Thomas Lammert, Anton Kummert:
FPGA Implementation of a Neural Network for a Real-Time Hand Tracking System. 313-317 - Serge N. Demidenko
Neural Networks to Solve the Problems of Control and Identification. 318-320 - Rui Xiao, Chip-Hong Chang
On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization. 321-325 - Saeid Sanei, Tracey Kah-Mein Lee:
An Architecture for High Speed Ultrasound Image Capture and Real-time 3D Reconstruction. 326-332
Special Session on Robotics
- Sourav Kundu, Kazuto Seto, Shigeru Sugino:
Genetic Algorithm Application to Vibration Control of Tall Flexible Structures. 333-337 - Gourab Sen Gupta
State Transition Based Supervisory Control for a Robot Soccer System. 338-342 - Dale A. Carnegie:
A Semi-Generic System for the Control of Autonomous Mobile Mechatrons. 343-346 - H. L. Sng, Gourab Sen Gupta
Strategy for Collaboration in Robot Soccer. 347-354
Special Session on Submicron Technology
- Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini, Haydar Hadi:
A Novel Analytical Model for Evaluation of Substrate Crosstalk in VLSI Circuits. 355-359 - Jacob A. Abraham, Arun Krishnamachary, Raghuram S. Tupuri:
A Comprehensive Fault Model for Deep Submicron Digital Circuits. 360-364 - Seung Hoon Choi, Kaushik Roy:
Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits. 365-369 - Manuel A. d'Abreu:
Noise-Its Sources, and Impact on Design and Test of Mixed Signal Circuits. 370-376
Test Generation and Compaction
- Irith Pomeranz, Sudhakar M. Reddy:
Properties of Output Sequences and their Use in Guiding Property-Based Test Generation for Synchronous Sequential Circuits. 377-381 - Christophe Paoli
Path-Oriented Test Data Generation of Behavioral VHDL Description. 382-386 - Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada:
Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. 387-391 - Kohei Miyase, Seiji Kajihara, Sudhakar M. Reddy:
A Method of Static Test Compaction Based on Don't Care Identification. 392-395 - Hideyuki Ichihara, Tomoo Inoue:
Generating Small Test Sets for Test Compression/Decompression Scheme Using Statistical Coding. 396-402
Test Techniques and Methodologies
- Ali Chehab
IDDT Test Methodologies for Very Deep Sub-micron CMOS Circuits. 403-407 - Gabriela Peretti
A Functional Approach to Test Cascaded BCD Counters. 408-412 - Seiji Kajihara, Kenjiro Taniguchi, Irith Pomeranz, Sudhakar M. Reddy:
Test Data Compression Using Don't-Care Identification and Statistical Encoding. 413-416 - Syed Mahfuzul Aziz
On C-Testability of Carry Free Dividers. 417-424
Poster Papers
- S. C. Mukhopadhyay
Modeling of a Repulsive Type Magnetic Bearing for Five Axis Control Under Intermittent Operation Including Eddy Current Effect. 425-427 - Chandan Chakraborty, Subhas C. Mukhopadhyay
A Novel Compound Type Resonant Rectifier Topology. 428-430 - Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu:
Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits. 431-433 - Jan Hlavicka, Petr Fiser:
Minimization and Partitioning Method Reducing Input Sets. 434-436 - Mirco Pieper, Anton Kummert:
Stand-alone Digital Real-Time Image Processing Board based on an FPGA. 437-439 - Zoorina Bee Kader Mastan, Azrul Ghazali, Muhammad Muhsin Idris:
Transmission of Data/Sketch through Telephone Lines using Gapping Technique via a Low Cost Telewriting Equipment . 440-442 - Matthew Worsman, Mike W. T. Wong, Yim-Shu Lee:
Enhancing The Static D. C. Fault Diagnosis Of A Resistance Temperature Detector Sensor Circuit Using Equivalent Fault Analysis. 443-446 - Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch:
Test Power: a Big Issue in Large SOC Designs. 447-449 - Sébastien Mallier, Fabienne Nouvel, Jean-Yves Baudais, Daniel Gardan, Ahmed Zeddam:
Multi-Carrier CDMA over Copper Lines-Comparison of Performances with the ADSL System. 450-452 - Leonardo L. Giovanini:
Multivariable Predictive Feedback Control. 453-458 - Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada:
Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits. 459-461 - Janusz Sosnowski
Monitoring Parallel Interfaces in System Environment. 462-465 - Shing Tenqchen, Ji-Horn Chang, Wu-Shiung Feng, Bor-Sheng Jeng:
Pipelining Extended Givens Rotation RLS Adaptive Filters. 466-473 - Yong Liu, Zhiqiang Gao, Xiangqing He:
A Flexible Embedded SRAM Compiler. 474-476 - Piia Simonen, Ilkka Saastamoinen, Mika Kuulusa, Jari Nurmi
Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor. 477-479 - William Phipps, Ibrahim Al-Bahadly:
Sensorless Speed Control in Induction Motor Drives. 480-482 - Paul Gaynor
A High Voltage Amplifier for use in Medical Applications of Electroporation. 483-485 - Adrian A. Dorrington, Rainer Künnemeyer
A Simple Microcontroller Based Digital Lock-in Amplifier for the Detection of Low Level Optical Signals. 486-488 - Ranjit Singh:
An Intelligent System for Odour Discrimination. 489-491 - Warwick Allen, Donald G. Bailey
Test Chirp Signal Generation Using Spectral Warping. 492-495 - Vivek Gaur, Vishwani D. Agrawal, Michael L. Bushnell:
A New Transitive Closure Algorithm with Application to Redundancy Identification. 496-500 - Donald G. Bailey
Test Bed for Number Plate Recognition Applications. 501-503 - Syed Mahfuzul Aziz
A Synthesisable VHDL Model for an Easily Testable Generalised Multiplier. 504-506 - Matthew Walker, Chris H. Messom
A Comparison of Genetic Programming and Genetic Algorithms for Auto-tuning Mobile Robot Motion Control. 507-510
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