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"Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging."

Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou (2009)

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DOI: 10.1109/TCAD.2008.2009163

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/JiangLJ09
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  - https://dblp.org/rec/journals/tcad/JiangLJ09
Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou:
Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(2): 272-284 (2009)

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