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"A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) ..."

Kai-Ren Cheng et al. (2018)

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DOI: 10.1109/ISCAS.2018.8351700

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-25

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Kai-Ren Cheng, Hsin-Shu Chen, Mickaël Lallart, Wen-Jong Wu:
A 0.25μm HV-CMOS Synchronous Inversion and Charge Extraction (SICE) Interface Circuit for Piezoelectric Energy Harvesting. ISCAS 2018: 1-4

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