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"Reducing Writing Energy Consumption for Non-Volatile Registers Utilizing ..."

Shota Matsuno, Masashi Tawada, Nozomu Togawa (2021)

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DOI: 10.1109/ICCE50685.2021.9427727

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-25

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Shota Matsuno, Masashi Tawada, Nozomu Togawa:
Reducing Writing Energy Consumption for Non-Volatile Registers Utilizing Frequent Patterns of Sequential Bits on RISC-V Architecture. ICCE 2021: 1-6

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