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"Synchronous equivalence for embedded systems: a tool for design exploration."

Harry Hsieh, Felice Balarin (1999)

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DOI: 10.1109/ICCAD.1999.810702

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/iccad/HsiehB99
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  persistent URL:
  - https://dblp.org/rec/conf/iccad/HsiehB99
Harry Hsieh, Felice Balarin:
Synchronous equivalence for embedded systems: a tool for design exploration. ICCAD 1999: 505-510

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