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"An efficient timing model for hardware implementation of multirate ..."

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu (2001)

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DOI: 10.1109/ICASSP.2001.941126

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu:
An efficient timing model for hardware implementation of multirate dataflow graphs. ICASSP 2001: 1153-1156

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