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"Hardware Acceleration of Parallel Lagged-Fibonacci Pseudo Random Number ..."

Yu Bi et al. (2006)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2007-02-14

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  dblp key:
  - conf/ersa/BiPWH06
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  persistent URL:
  - https://dblp.org/rec/conf/ersa/BiPWH06
Yu Bi, Gregory D. Peterson, G. Lee Warren, Robert J. Harrison:
Hardware Acceleration of Parallel Lagged-Fibonacci Pseudo Random Number Generation. ERSA 2006: 215-218

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