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"Low-power design of sequential circuits using a quasi-synchronous derived ..."

Xunwei Wu et al. (2000)

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DOI: 10.1145/368434.368672

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-12

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  dblp key:
  - conf/aspdac/WuWPW00
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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/WuWPW00
Xunwei Wu, Jian Wei, Massoud Pedram, Qing Wu:
Low-power design of sequential circuits using a quasi-synchronous derived clock. ASP-DAC 2000: 345-350

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