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"Block-level 3D IC design with through-silicon-via planning."
Dae Hyun Kim, Rasit Onur Topaloglu, Sung Kyu Lim (2012)
- Dae Hyun Kim, Rasit Onur Topaloglu, Sung Kyu Lim:
Block-level 3D IC design with through-silicon-via planning. ASP-DAC 2012: 335-340
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