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"A 2.2-GHz 3.2-mW DTC-free Sampling ΔΣ Fractional-N PLL with -110 ..."

Jingcheng Tao, Chun-Huat Heng (2019)

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DOI: 10.23919/VLSIC.2019.8778000

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

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Jingcheng Tao, Chun-Huat Heng:
A 2.2-GHz 3.2-mW DTC-free Sampling ΔΣ Fractional-N PLL with -110 dBc/Hz In-band phase noise and -246dB FoM and -83dBc Reference Spur. VLSI Circuits 2019: 162-

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