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"A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous ..."

Cagla Cakir et al. (2019)

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DOI: 10.23919/VLSIC.2019.8778108

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-05

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Cagla Cakir, Andy W. Chen, Y. K. Chong, Sriram Thyagarajan, Mark P. McCartney, Peixuan Tan, Yulin Shi, Mudit Bhargava:
A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms. VLSI Circuits 2019: 112-

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