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Hisayasu Sato
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2020 – today
- 2022
- [c5]Kenichi Shibata, Hiroaki Matsui, Hironori Asano, Yuichi Kusaka, Keisuke Ueda, Noriaki Matsuno, Hisayasu Sato:
A 22nm 0.84mm2 BLE Transceiver With Self IQ-Phase Correction Achieving 39dB Image Rejection and on-Chip Antenna Impedance Tuning. ISSCC 2022: 398-400
2010 – 2019
- 2015
- [c4]Tomohiro Sano, Masakazu Mizokami, Hiroaki Matsui, Keisuke Ueda, Kenichi Shibata, Kenji Toyota, Tatsuhito Saitou, Hisayasu Sato, Koichi Yahagi, Yoshihiro Hayashi
:
13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network. ISSCC 2015: 1-3 - 2013
- [j10]Takao Kihara
A Multiband LTE SAW-Less CMOS Transmitter with Source-Follower-Driven Passive Mixers, Envelope-Tracked RF-PGAs, and Marchand Baluns. IEICE Trans. Electron. 96-C(6): 774-782 (2013) - 2012
- [c3]Keisuke Ueda, Toshiya Uozumi, Ryo Endo, Takahiro Nakamura, Tetsuya Heima, Hisayasu Sato:
A digital PLL with two-step closed-locking for multi-mode/multi-band SAW-less transmitter. CICC 2012: 1-4 - 2011
- [j9]Hisayasu Sato, Takaya Maruyama, Toshimasa Matsuoka
A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation. IEICE Trans. Electron. 94-C(8): 1311-1319 (2011)
2000 – 2009
- 2007
- [c2]Tomohiro Sano, Takaya Maruyama, Ikuo Yasui, Hisayasu Sato, Toshihiko Shimizu:
A 1.8 mm2, 11 mA, 23.2 dB-NF, discrete-time filter for GSM/WCDMA/WLAN using retiming technique. CICC 2007: 703-706 - 2003
- [j8]Hiroshi Komurasaki, Tomohiro Sano, Tetsuya Heima, Kazuya Yamamoto, Hideyuki Wakada, Ikuo Yasui, Masayoshi Ono, Toshitsugu Miwa, Hisayasu Sato, Takahiro Miki, Naoyuki Kato:
A 1.8-V operation RF CMOS transceiver for 2.4-GHz-band GFSK applications. IEEE J. Solid State Circuits 38(5): 817-825 (2003) - [c1]Ryutaro Saito, Kinya Hosoda, Akira Hyogo, Takaya Maruyama, Hiroshi Komuraki, Hisayasu Sato, Keitaro Sekine:
A 1.8-V 73-dB dynamic-range CMOS variable gain amplifier. ESSCIRC 2003: 301-304 - 2002
- [j7]Hiroshi Komurasaki, Kazuya Yamamoto, Hideyuki Wakada, Tetsuya Heima, Akihiko Furukawa, Hisayasu Sato, Takahiro Miki, Naoyuki Kato, Akira Hyogo, Keitaro Sekine:
2.4-GHz-Band CMOS RF Front-End Building Blocks at a 1.8-V Supply. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2): 300-308 (2002) - 2001
- [j6]Kazuya Yamamoto, Tetsuya Heima, Akihiko Furukawa, Masayoshi Ono, Yasushi Hashizume, Hiroshi Komurasaki, Shigenobu Maeda, Hisayasu Sato, Naoyuki Kato:
A 2.4-GHz-band 1.8-V operation single-chip Si-CMOS T/R-MMIC front-end with a low insertion loss switch. IEEE J. Solid State Circuits 36(8): 1186-1197 (2001)
1990 – 1999
- 1998
- [j5]Hiroshi Komurasaki, Hisayasu Sato, Nagisa Sasaki, Takahiro Miki:
A 2-V 1.9-GHz Si down-conversion mixer with an LC phase shifter. IEEE J. Solid State Circuits 33(5): 812-815 (1998) - 1996
- [j4]Kimio Ueda, Nagisa Sasaki, Hisayasu Sato, Koichiro Mashiko:
A fully compensated active pull-down ECL circuit with self-adjusting driving capability. IEEE J. Solid State Circuits 31(1): 46-53 (1996) - [j3]Hisayasu Sato, Kenichi Kashiwagi, Kazuhito Niwano, Tetsuya Iga, Tatsuhiko Ikeda, Koichiro Mashiko, Tadashi Sumi, Koji Tsuchihashi:
A 1.9-GHz single chip IF transceiver for digital cordless phones. IEEE J. Solid State Circuits 31(12): 1974-1980 (1996) - 1994
- [j2]Hisayasu Sato, Kimio Ueda, Nagisa Sasaki, Tatsuhiko Ikeda, Koichiro Mashiko:
A voltage compensated series-gate bipolar circuit operating at sub-2 V. IEEE J. Solid State Circuits 29(10): 1200-1205 (1994)
1980 – 1989
- 1989
- [j1]Hisayasu Sato, Takashi Nishimura, Makoto Tatsuki, Atsushi Ohba, Shiro Hine, Yoichi Kuramitsu:
A 209 K-transistor ECL gate array with RAM. IEEE J. Solid State Circuits 24(5): 1275-1279 (1989)
Coauthor Index
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