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Stuart Fiske
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2000 – 2009
- 2009
- [c6]Chris Rowen, Peter R. Nuth, Stuart Fiske:
A DSP architecture optimized for wireless baseband. SoC 2009: 151-156
1990 – 1999
- 1998
- [c5]William J. Dally, Andrew A. Chien, Stuart Fiske, Waldemar Horwat, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, Ellen Spertus, Deborah A. Wallach, D. Scott Wills, Andrew Chang, John S. Keen:
Retrospective: the J-machine. 25 Years ISCA: Retrospectives and Reprints 1998: 54-58 - 1995
- [b1]Stuart Fiske:
Thread scheduling mechanisms for multiple-context parallel processors. Massachusetts Institute of Technology, Cambridge, MA, USA, 1995 - [j2]Stuart Fiske, William J. Dally:
Thread prioritization: A thread scheduling mechanism for multiple-context parallel processors. Future Gener. Comput. Syst. 11(6): 503-518 (1995) - [c4]Stuart Fiske, William J. Dally:
Thread Prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors. HPCA 1995: 210-221 - 1992
- [j1]William J. Dally, Stuart Fiske, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, Roy E. Davison, Gregory A. Fyler:
The message-driven processor: a multicomputer processing node with efficient mechanisms. IEEE Micro 12(2): 23-39 (1992) - [c3]William J. Dally, Andrew A. Chien, Stuart Fiske, Gregory A. Fyler, Waldemar Horwat, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, D. Scott Wills:
The Message Driven Processor: An Integrated Multicomputer Processing Element. ICCD 1992: 416-419
1980 – 1989
- 1989
- [c2]William J. Dally, Andrew A. Chien, Stuart Fiske, Waldemar Horwat, John S. Keen, Michael Larivee, Richard A. Lethin, Peter R. Nuth, D. Scott Wills:
The J-Machine: A Fine-Gain Concurrent Computer. IFIP Congress 1989: 1147-1153 - 1988
- [c1]Stuart Fiske, William J. Dally:
The Reconfigurable Arithmetic Processor. ISCA 1988: 30-36
Coauthor Index
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