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Kai Misselwitz
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2020 – today
- 2024
- [c5]Patrick Kurth, Philipp Scholz, Philipp Nickel, Urs Hecht, Enne Wittenhagen, Kai Misselwitz, Friedel Gerfers:
A mmw Low-Noise Sub-Sampling Phase-Locked Loop with a Non-Pulsed Charge Pump, Frequency Calibration and a Compact Ultra-High-Q Resonator. ISCAS 2024: 1-5 - [c4]Kai Misselwitz, Friedel Gerfers:
A 16 GS/s Voltage-to-Time Conversion Sampler with 35.9 dB SNDR in 22 nm CMOS FDSOI. ISCAS 2024: 1-5 - 2023
- [j1]Marcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers:
An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter. IEEE J. Solid State Circuits 58(8): 2288-2299 (2023) - 2022
- [c3]Kai Misselwitz, Marcel Runge, Friedel Gerfers:
A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DAC. ICECS 2022 2022: 1-4 - 2021
- [c2]Patrick Kurth, Kai Misselwitz, Urs Hecht, Friedel Gerfers:
A 56 GHz 19 fs RMS-Jitter Sub-Sampling Phase-Locked Loop for 112 Gbit/s Transceivers. ISCAS 2021: 1-5 - 2020
- [c1]Patrick Kurth, Kai Misselwitz, Urs Hecht, Friedel Gerfers:
A Transmission-Line-based Phase Shifter for High-Speed, Ultra-Low-Power N-PSK Transmitters. ICECS 2020: 1-4
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last updated on 2024-07-17 20:33 CEST by the dblp team
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