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Marcel Runge
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2020 – today
- 2023
- [j2]Marcel Runge, Julius Edler, Tobias Kaiser, Kai Misselwitz, Friedel Gerfers:
An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter. IEEE J. Solid State Circuits 58(8): 2288-2299 (2023) - [c18]Julius Edler, Marcel Runge, Sebastian Linnhoff, Friedel Gerfers:
A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC Filter. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c17]Marcel Runge, Julius Edler, Dario Schmock, Tobias Kaiser, Friedel Gerfers:
A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS. CICC 2022: 1-2 - [c16]Kai Misselwitz, Marcel Runge, Friedel Gerfers:
A Calibration-Free 96.7 dB SNDR 4 MS/s CT I-SD Modulator With Single Feedback DAC. ICECS 2022 2022: 1-4 - 2021
- [j1]Enne Wittenhagen, Marcel Runge, Nima Lotfi, Hossein Ghafarian, Yuan Tian, Friedel Gerfers:
Advanced Mixed Signal Concepts Exploiting the Strong Body-Bias Effect in CMOS 22FDX®. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 57-66 (2021) - [c15]Marcel Runge, Julius Edler, Tobias Kaiser, Friedel Gerfers:
A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS. CICC 2021: 1-2 - [c14]Marcel Runge, Dario Schmock, Tobias Kaiser, Friedel Gerfers:
A 0.9V 45MS/s CT ΔΣ Modulator with 94dB SFDR and 25.6fJ/conv. enabled by a Digital Static and ISI Calibration in 22 FDSOI CMOS. CICC 2021: 1-2 - [c13]Julius Edler, Marcel Runge, Friedel Gerfers:
A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOS. MWSCAS 2021: 1090-1093 - 2020
- [c12]Paul Hollmann, Marcel Runge, Friedel Gerfers:
A 64 GBaud 6-Bit Current Steering DAC With a Binary Tree Current Summing Network. ICECS 2020: 1-4 - [c11]Marcel Runge, Dario Schmock, Enne Wittenhagen, Friedel Gerfers:
A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX. ISCAS 2020: 1-5 - [c10]Enne Wittenhagen, Marcel Runge, Wilhelm Keusgen, Friedel Gerfers:
A Sub-Sampling Beam-Forming Summation Track and Hold for Software Defined Radio. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c9]Friedel Gerfers, Nima Lotfi, Enne Wittenhagen, Hossein Ghafarian, Yuan Tian, Marcel Runge:
Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and Systems. ICECS 2019: 466-469 - [c8]Nima Lotfi, Pedro Lehmann Ibáñez, Marcel Runge, Friedel Gerfers:
A Single-Channel 18.5 GS/s 5-bit Flash ADC using a Body-Biased Comparator Architecture in 22nm FD-SOI. ISCAS 2019: 1-4 - [c7]Marcel Runge, Nima Lotfi, Friedel Gerfers:
Optimized Zero Placement within Noise Coupling Transfer Functions for Oversampled ADCs. ISCAS 2019: 1-5 - 2018
- [c6]Marcel Runge, Dario Schmock, Philipp Scholz, Georg Böck, Friedel Gerfers:
A 0.02-mm2 9-bit 100-MS/s Charge-Injection Cell Based SAR-ADC in 65-nm LP CMOS. ESSCIRC 2018: 26-29 - [c5]Marcel Runge, Friedel Gerfers:
Correlation Based Time-Variant DAC Error Estimation in Continuous-Time ∑Δ ADCs With Pseudo Random Noise. ISCAS 2018: 1-5 - [c4]Nima Lotfi, Marcel Runge, Friedel Gerfers:
AMDAC Common-Mode Shifting Technique enabling Power Consumption Reduction in Pipeline ADCs. MWSCAS 2018: 400-403 - [c3]Marcel Runge, Sebastian Linnhoff, Friedel Gerfers:
A Temperature and Process Corner Insensitive Design Method for Digital Circuits in 40nm CMOS. MWSCAS 2018: 779-782 - 2017
- [c2]Marcel Runge, Friedel Gerfers:
A digital compensation method canceling static and non-linear time-variant feedback DAC errors in ΣΔ analog-to-digital converters. ISCAS 2017: 1-4 - [c1]Marcel Runge, Dario Schmock, Friedel Gerfers:
Noise and non-linearity analysis of a charge-injection-cell-based 10-bit 50-MS/s SAR-ADC. MWSCAS 2017: 1025-1028
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