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Nestoras E. Evmorfopoulos
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2020 – today
- 2024
- [c53]Anastasis Vagenas, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
Advanced gate-level glitch modeling using ANNs. DAC 2024: 40:1-40:6 - [c52]Olympia Axelou, Kostas Kolomvatsos, George Floros, Nestor E. Evmorfopoulos, Georg I. Georgakos, George Stamoulis:
An Electromigration-Aware Wire Sizing Methodology via Particle Swarm Optimization. ACM Great Lakes Symposium on VLSI 2024: 403-408 - [c51]Chrysostomos Chatzigeorgiou, George Floros, Dimitrios Chatzigeorgiou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Efficient Parametric Model Order Reduction for Large-Scale Circuit Models using Extended Krylov Subspace. SMACD 2024: 1-4 - [c50]Christos Giamouzis, Dimitrios Garyfallou, Georgios I. Stamoulis, Nestoras E. Evmorfopoulos:
Low-rank balanced truncation of RLCk models via frequency-aware rational Krylov-based projection. SMACD 2024: 1-4 - [c49]Pavlos Stoikos, George Floros, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
A Fast Security Closure Approach for EM-based Attacks on General Multi-Segment Interconnects. SMACD 2024: 1-4 - [c48]Alexandra Takou, Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
Sensitivity-aware Hardware Trojan Injection for SET Propagation and Soft Error Attacks. SMACD 2024: 1-4 - [c47]Anastasis Vagenas, Dimitrios Garyfallou, Nestoras E. Evmorfopoulos, George I. Stamoulis:
A learning-based method for performance optimization of timing analysis. SMACD 2024: 1-4 - [i5]Dimitrios Garyfallou, Athanasios Stefanou, Christos Giamouzis, Moschos Antoniadis, Georgios Chararas, Konstantinos Chatzis, Dimitris Samaras, Rafaela Themeli, Anastasios Michailidis, Vasiliki Gogolou, Nikos Zachos, Nestor E. Evmorfopoulos, Thomas Noulis, Vasilis F. Pavlidis, Alkiviadis Hatzopoulos, Elpida Chatzineofytou, Yiannis Moisiadis:
MORCIC: Model Order Reduction Techniques for Electromagnetic Models of Integrated Circuits. CoRR abs/2401.10236 (2024) - 2023
- [j7]Olympia Axelou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Fast electromigration stress analysis using Low-Rank Balanced Truncation for general interconnect and power grid structures. Integr. 89: 197-206 (2023) - [c46]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees Using Matrix Exponential. ASP-DAC 2023: 1-6 - [c45]Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Dimitrios Garyfallou, Anastasis Vagenas, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
Accurate Soft Error Rate Evaluation Using Event-Driven Dynamic Timing Analysis. DFT 2023: 1-6 - [c44]Alexandra Takou, Pavlos Stoikos, Moysis Moysis, George Floros, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
An Efficient Security Closure Methodology for EM-based Attacks on Power Grid Structures. DFT 2023: 1-4 - [c43]Olympia Axelou, Pavlos Stoikos, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
A System Theoretic Approach for the Reduction of Large-Scale Room Acoustic Models. EUSIPCO 2023: 381-385 - [c42]Pavlos Stoikos, Olympia Axelou, George Floros, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
On the Reduction of Large-Scale Room Acoustic Models. ICASSP 2023: 1-5 - [c41]Mohammad Abdullah Al Shohel, Vidya A. Chhabria, Nestoras E. Evmorfopoulos, Sachin S. Sapatnekar:
Frequency-Domain Transient Electromigration Analysis Using Circuit Theory. ICCAD 2023: 1-8 - [c40]Nestor E. Evmorfopoulos, Mohammad Abdullah Al Shohel, Olympia Axelou, Pavlos Stoikos, Vidya A. Chhabria, Sachin S. Sapatnekar:
Recent Progress in the Analysis of Electromigration and Stress Migration in Large Multisegment Interconnects. ISPD 2023: 115-123 - [c39]Alexandra Takou, Olympia Axelou, George Floros, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
An Optimal Methodology for EM-Based Hardware Trojan Placement on Clock Tree Networks. MWSCAS 2023: 25-29 - [c38]Olympia Axelou, Eleni Tselepi, George Floros, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power Grids. SMACD 2023: 1-4 - [c37]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Electromigration Stress Analysis with Rational Krylov-based Approximation of Matrix Exponential. SMACD 2023: 1-4 - [i4]Christos Giamouzis, Dimitrios Garyfallou, Anastasis Vagenas, Nestor E. Evmorfopoulos:
Reduction of large-scale RLCk models via low-rank balanced truncation. CoRR abs/2311.08478 (2023) - 2022
- [c36]Olympia Axelou, Nestor E. Evmorfopoulos, George Floros, George I. Stamoulis, Sachin S. Sapatnekar:
A Novel Semi-Analytical Approach for Fast Electromigration Stress Analysis in Multi-Segment Interconnects. ICCAD 2022: 27:1-27:7 - [c35]Olympia Axelou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Accelerating Electromigration Stress Analysis Using Low-Rank Balanced Truncation. SMACD 2022: 1-4 - [i3]Pavlos Stoikos, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
The Extended and Asymmetric Extended Krylov Subspace in Moment-Matching-Based Order Reduction of Large Circuit Models. CoRR abs/2204.02467 (2022) - [i2]Pavlos Stoikos, George Floros, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, George I. Stamoulis:
A Fast Semi-Analytical Approach for Transient Electromigration Analysis of Interconnect Trees using Matrix Exponential. CoRR abs/2211.10320 (2022) - 2021
- [j6]Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Graph-Based Sparsification and Synthesis of Dense Matrices in the Reduction of RLC Circuits. IEEE Trans. Very Large Scale Integr. Syst. 29(3): 580-590 (2021) - [j5]Dimitrios Garyfallou, Stavros Simoglou, Nikolaos Sketopoulos, Charalampos Antoniadis, Christos P. Sotiriou, Nestor E. Evmorfopoulos, George I. Stamoulis:
Gate Delay Estimation With Library Compatible Current Source Models and Effective Capacitance. IEEE Trans. Very Large Scale Integr. Syst. 29(5): 962-972 (2021) - [c34]Chrysostomos Chatzigeorgiou, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models. ASP-DAC 2021: 773-778 - [c33]Pelopidas Tsoumanis, Georgios Ioannis Paliaroutis, Nestoras E. Evmorfopoulos, George I. Stamoulis:
On the Impact of Electrical Masking and Timing Analysis on Soft Error Rate Estimation in Deep Submicron Technologies. DFT 2021: 1-6 - [c32]Mohammad Abdullah Al Shohel, Vidya A. Chhabria, Nestor E. Evmorfopoulos, Sachin S. Sapatnekar:
Analytical Modeling of Transient Electromigration Stress based on Boundary Reflections. ICCAD 2021: 1-8 - [c31]Dimitrios Bountas, Nestor E. Evmorfopoulos, George Dimitriou, Antonios N. Dadaliaris, George Floros, Georgios I. Stamoulis:
Statistical Estimation of Leakage Power Bounds in CMOS VLSI Circuits. PCI 2021: 312-317 - 2020
- [j4]George Floros, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Frequency-Limited Reduction of Regular and Singular Circuit Models Via Extended Krylov Subspace Method. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1610-1620 (2020) - [c30]Dimitrios Garyfallou, Ioannis Tsiokanos, Nestor E. Evmorfopoulos, Georgios I. Stamoulis, Georgios Karakonstantis:
Accurate Estimation of Dynamic Timing Slacks using Event-Driven Simulation. ISQED 2020: 225-230 - [c29]Christos Georgakidis, Georgios Ioannis Paliaroutis, Nikolaos Sketopoulos, Pelopidas Tsoumanis, Christos P. Sotiriou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Layout-Based Soft Error Rate Estimation and Mitigation in the Presence of Multiple Transient Faults in Combinational Logic. ISQED 2020: 231-236 - [i1]Chrysostomos Chatzigeorgiou, Dimitrios Garyfallou, George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models. CoRR abs/2007.01948 (2020)
2010 – 2019
- 2019
- [j3]George Floros, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
Efficient IC hotspot thermal analysis via low-rank Model Order Reduction. Integr. 66: 1-8 (2019) - [c28]Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Efficient sparsification of dense circuit matrices in model order reduction. ASP-DAC 2019: 255-260 - [c27]Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Rigorous Approach for the Sparsification of Dense Matrices in Model Order Reduction of RLC Circuits. DAC 2019: 68 - [c26]Charalampos Antoniadis, Milan Mihajlovic, Nestor E. Evmorfopoulos, Georgios I. Stamoulis, Vasilis F. Pavlidis:
Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits. ICCD 2019: 405-408 - [c25]Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestor E. Evmorfopoulos, George Dimitriou, Georgios I. Stamoulis:
Multiple Transient Faults in Combinational Logic with Placement Considerations. MOCAST 2019: 1-4 - [c24]Dimitrios Garyfallou, Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Sparsity-Aware MOR Methodology for Fast and Accurate Timing Analysis of VLSI Interconnects. SMACD 2019: 89-92 - [c23]George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Efficient Circuit Reduction in Limited Frequency Windows. SMACD 2019: 129-132 - 2018
- [c22]Charalampos Antoniadis, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
EVT-based worst case delay estimation under process variation. DATE 2018: 1333-1338 - [c21]Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestor E. Evmorfopoulos, George Dimitriou, Georgios I. Stamoulis:
A Placement-Aware Soft Error Rate Estimation of Combinational Circuits for Multiple Transient Faults in CMOS Technology. DFT 2018: 1-6 - [c20]Michael K. Tsiampas, Nestor E. Evmorfopoulos, Konstantis Daloukas, John Moondanos, Georgios I. Stamoulis:
A power-supply noise aware dynamic timing analysis methodology, based on a statistical prediction engine. DTIS 2018: 1-6 - [c19]George Floros, Konstantis Daloukas, Nestor E. Evmorfopoulos, George I. Stamoulis:
A parallel iterative approach for efficient full chip thermal analysis. MOCAST 2018: 1-4 - [c18]Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Large scale circuit simulation exploiting combinatorial multigrid on massively parallel architectures. MOCAST 2018: 1-4 - [c17]Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
On the Sparsification of the Reluctance Matrix in RLCk Circuit Transient Analysis. SMACD 2018: 201-204 - [c16]George Floros, Nestor E. Evmorfopoulos, George I. Stamoulis:
Efficient Hotspot Thermal Simulation Via Low-Rank Model Order Reduction. SMACD 2018: 205-208 - [c15]Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
A Combinatorial Multigrid Preconditioned Iterative Method for Large Scale Circuit Simulation on GPU s. SMACD 2018: 209-212 - 2017
- [c14]Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestor E. Evmorfopoulos, George Dimitriou, Georgios I. Stamoulis:
Placement-based SER estimation in the presence of multiple faults in combinational logic. PATMOS 2017: 1-6 - 2016
- [j2]Konstantis Daloukas, Nestor E. Evmorfopoulos, Panagiota E. Tsompanopoulou, George I. Stamoulis:
Parallel Fast Transform-Based Preconditioners for Large-Scale Power Grid Analysis on Graphics Processing Units (GPUs). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1653-1666 (2016) - 2015
- [c13]Charalampos Antoniadis, Georgios Karakonstantis, Nestor E. Evmorfopoulos, Andreas Peter Burg, George I. Stamoulis:
On the statistical memory architecture exploration and optimization. DATE 2015: 543-548 - 2014
- [c12]Ifigeneia Apostolopoulou, Konstantis Daloukas, Nestor E. Evmorfopoulos, George I. Stamoulis:
Selective Inversion of Inductance Matrix for Large-Scale Sparse RLC Simulation. DAC 2014: 119:1-119:6 - [c11]Konstantis Daloukas, Nestor E. Evmorfopoulos, Panagiota E. Tsompanopoulou, George I. Stamoulis:
A 3-D Fast Transform-based preconditioner for large-scale power grid analysis on massively parallel architectures. ISQED 2014: 723-730 - 2013
- [c10]Alessandro Cevrero, Nestor E. Evmorfopoulos, Charalampos Antoniadis, Paolo Ienne, Yusuf Leblebici, Andreas Burg, Georgios I. Stamoulis:
Fast and accurate BER estimation methodology for I/O links based on extreme value theory. DATE 2013: 503-508 - [c9]Konstantis Daloukas, Alexia Marnari, Nestor E. Evmorfopoulos, Panagiota E. Tsompanopoulou, George I. Stamoulis:
A parallel fast transform-based preconditioning approach for electrical-thermal co-simulation of power delivery networks. DATE 2013: 1689-1694 - 2012
- [c8]Konstantis Daloukas, Nestoras E. Evmorfopoulos, George Drasidis, Michalis K. Tsiampas, Panagiota E. Tsompanopoulou, George I. Stamoulis:
Fast Transform-based preconditioners for large-scale power grid analysis on massively parallel architectures. ICCAD 2012: 384-391 - 2010
- [c7]Nestoras E. Evmorfopoulos, Maria-Aikaterini Rammou, George I. Stamoulis, John Moondanos:
Characterization of the worst-case current waveform excitations in general RLC-model power grid analysis. ICCAD 2010: 824-830 - [c6]Michalis K. Tsiampas, Dimitrios Bountas, Panagiotis Merakos, Nestoras E. Evmorfopoulos, Sotiris Bantas, George I. Stamoulis:
A power grid analysis and verification tool based on a Statistical Prediction Engine. ICECS 2010: 839-842
2000 – 2009
- 2008
- [c5]Dimitrios Bountas, Georgios I. Stamoulis, Nestoras E. Evmorfopoulos:
A macromodel technique for VLSI dynamic simulation by mapping pre-characterized transitions. ICCD 2008: 450-456 - [c4]Dimitris P. Karampatzakis, Michalis K. Tsiampas, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
A Design Flow for the Precise Identification of the Worst-Case Voltage Drop in Power Grid Analyses. Panhellenic Conference on Informatics 2008: 135-139 - 2006
- [c3]Nestoras E. Evmorfopoulos, Dimitris P. Karampatzakis, Georgios I. Stamoulis:
Precise identification of the worst-case voltage drop conditions in power grid verification. ICCAD 2006: 112-118 - 2004
- [c2]Nestoras E. Evmorfopoulos, Dimitris P. Karampatzakis, Georgios I. Stamoulis:
Voltage-drop-constrained optimization of power distribution network based on reliable maximum current estimates. ICCAD 2004: 479-484 - 2002
- [j1]Nestoras E. Evmorfopoulos, Georgios I. Stamoulis, John N. Avaritsiotis:
A Monte Carlo approach for maximum power estimation based onextreme value theory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(4): 415-432 (2002)
1990 – 1999
- 1999
- [c1]Nestor E. Evmorfopoulos, John N. Avaritsiotis:
Adaptive digital fuzzy hardware in application-specific integrated circuits. ICECS 1999: 1635-1638
Coauthor Index
aka: George I. Stamoulis
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last updated on 2024-12-03 20:29 CET by the dblp team
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