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Kazuhiko Shimakawa
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2010 – 2019
- 2015
- [c4]Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, W. Boullart, E. Vecchio, T. Vandeweyer, T. Witters, D. Crotti, M. Jurczak, S. Fujii, S. Ito, Y. Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda:
Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application. VLSIC 2015: 14- - 2014
- [c3]Ken Kawai, Akifumi Kawahara, Ryutaro Yasuhara, Shunsaku Muraoka, Zhiqiang Wei, Ryotaro Azuma, Kouhei Tanabe, Kazuhiko Shimakawa:
Highly-reliable TaOx reram technology using automatic forming circuit. ICICDT 2014: 1-4 - 2013
- [j2]Akifumi Kawahara, Ryotaro Azuma, Yuuichirou Ikeda, Ken Kawai, Yoshikazu Katoh, Yukio Hayakawa, Kiyotaka Tsuji, Shinichi Yoneda, Atsushi Himeno, Kazuhiko Shimakawa, Takeshi Takagi, Takumi Mikawa, Kunitoshi Aono:
An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput. IEEE J. Solid State Circuits 48(1): 178-185 (2013) - [c2]Akifumi Kawahara, Ken Kawai, Yuuichirou Ikeda, Yoshikazu Katoh, Ryotaro Azuma, Yuhei Yoshimoto, Kouhei Tanabe, Zhiqiang Wei, Takeki Ninomiya, Koji Katayama, Ryutaro Yasuhara, Shunsaku Muraoka, Atsushi Himeno, Naoki Yoshikawa, Hideaki Murase
, Kazuhiko Shimakawa, Takeshi Takagi, Takumi Mikawa, Kunitoshi Aono:
Filament scaling forming technique and level-verify-write scheme with endurance over 107 cycles in ReRAM. ISSCC 2013: 220-221 - 2012
- [c1]Akifumi Kawahara, Ryotaro Azuma, Yuuichirou Ikeda, Ken Kawai, Yoshikazu Katoh, Kouhei Tanabe, Toshihiro Nakamura, Yoshihiko Sumimoto, Naoki Yamada, Nobuyuki Nakai, Shoji Sakamoto, Yukio Hayakawa, Kiyotaka Tsuji, Shinichi Yoneda, Atsushi Himeno, Ken-ichi Origasa, Kazuhiko Shimakawa, Takeshi Takagi, Takumi Mikawa, Kunitoshi Aono:
An 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput. ISSCC 2012: 432-434
2000 – 2009
- 2005
- [j1]Masahisa Iida, Naoki Kuroda, Hidefumi Otsuka, Masanobu Hirose, Yuji Yamasaki, Kiyoto Ohta, Kazuhiko Shimakawa, Takashi Nakabayashi, Hiroyuki Yamauchi
A 322 MHz random-cycle embedded DRAM with high-accuracy sensing and tuning. IEEE J. Solid State Circuits 40(11): 2296-2304 (2005)
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