default search action
Paul G. A. Jespers
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
Books and Theses
- 2003
- [b1]Carlos Dualibe, Michel Verleysen, Paul G. A. Jespers:
Design of analog fuzzy logic controllers in CMOS technologies - implementation, test and application. Kluwer 2003, pp. I-VIII, 1-214
Journal Articles
- 2008
- [j13]Gian Nicola Angotzi, Massimo Barbaro
, Paul G. A. Jespers:
Modeling, Evaluation, and Comparison of CRZ and RSD Redundant Architectures for Two-Step A/D Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(9): 2445-2458 (2008) - 1997
- [j12]Denis Flandre
Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology. IEEE J. Solid State Circuits 32(7): 1006-1012 (1997) - 1996
- [j11]Jean-Paul Eggennont, Denis De Ceuster, Denis Flandre
Design of SOI CMOS operational amplifiers for applications up to 300°C. IEEE J. Solid State Circuits 31(2): 179-186 (1996) - [j10]Fernando Silveira, Denis Flandre
A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA. IEEE J. Solid State Circuits 31(9): 1314-1319 (1996) - 1994
- [j9]Damien Macq, Paul G. A. Jespers:
A 10-bit pipelined switched-current A/D converter. IEEE J. Solid State Circuits 29(8): 967-971 (1994) - 1993
- [j8]Damien Macq, Michel Verleysen, Paul G. A. Jespers, Jean-Didier Legat:
Analog implementation of a Kohonen map with on-chip learning. IEEE Trans. Neural Networks 4(3): 456-461 (1993) - 1989
- [j7]Michel Verleysen, Bruno Sirletti, Andre M. Vandemeulebroecke, Paul G. A. Jespers:
Neural networks for high-storage content-addressable memory: VLSI circuit and learning algorithm. IEEE J. Solid State Circuits 24(3): 562-569 (1989) - [j6]Michel Verleysen, Paul G. A. Jespers:
An analog VLSI implementation of Hopfield's neural network. IEEE Micro 9(6): 46-55 (1989) - 1988
- [j5]Tony Denayer, Etienne Vanzieleghem, Paul G. A. Jespers:
A class of multiprocessors for real-time image and multidimensional signal processing. IEEE J. Solid State Circuits 23(3): 630-638 (1988) - [j4]Bruno Sirletti, Michel Verleysen, Andre M. Vandemeulebroecke, Paul G. A. Jespers:
An algorithm for pattern recognition with VLSI neural networks. Neural Networks 1(Supplement-1): 53 (1988) - [j3]Michel Verleysen, Bruno Sirletti, Paul G. A. Jespers:
A large VLSI Hopfield network for pattern recognition problems. Neural Networks 1(Supplement-1): 414-418 (1988) - 1980
- [j2]Michel C. Rahier, Paul G. A. Jespers:
Dedicated LSI for a Microprocessor-Controlled Hand-Carried OCR System. IEEE Trans. Computers 29(2): 79-88 (1980) - 1962
- [j1]Paul G. A. Jespers, Pe Tsi Chu, Alfred Fettweis:
A new method to compute correlation functions (Abstr.). IRE Trans. Inf. Theory 8(5): 106-107 (1962)
Conference and Workshop Papers
- 2015
- [c12]Paul G. A. Jespers, Boris Murmann
Calculation of MOSFET distortion using the transconductance-to-current ratio (gm/ID). ISCAS 2015: 529-532 - 2008
- [c11]Gian Nicola Angotzi, Massimo Barbaro
Comparison of redundant architectures for two-step ADCs. ACM Great Lakes Symposium on VLSI 2008: 445-450 - [c10]Paul G. A. Jespers:
Sizing CMOS circuits by means of the gm/ID methodology and a compact model. SBCCI 2008: 1 - 2007
- [c9]Paul G. A. Jespers:
Sizing low-voltage CMOS analog circuits. ICECS 2007: 752-755 - 2006
- [c8]Andrei Vladimirescu, Radu Zlatanovici, Paul G. A. Jespers:
Analog circuit synthesis using standard EDA tools. ISCAS 2006 - 2002
- [c7]Razvan Ionita, Andrei Vladimirescu, Paul G. A. Jespers:
Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems. PATMOS 2002: 487-494 - 2001
- [c6]Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen:
Embedded fuzzy control for automatic channel equalization after digital transmissions. ISCAS (3) 2001: 173-176 - [c5]Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen:
On Designing Mixed-Signal Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS Technologies. SBCCI 2001: 194-200 - 2000
- [c4]Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen:
A 5.26 Mflips programmable analogue fuzzy logic controller in a standard CMOS 2.4 μ technology. ISCAS 2000: 377-380 - 1991
- [c3]Michel Verleysen, Paul G. A. Jespers:
Analog VLSI Synapse Matrix with Enhanced Stochastic Computations. IWANN 1991: 315-321 - 1989
- [c2]André Vandermeulebroecke, Etienne Vanzieleghem, Tony Denayer, Paul G. A. Jespers:
A Single Chip 1024 Bits RSA Processor. EUROCRYPT 1989: 219-236 - [c1]Michel Verleysen, Paul G. A. Jespers:
An Analog VLSI Architecture for Large Neural Networks. NATO Neurocomputing 1989: 141-144
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-13 23:51 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: